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author | Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com> | 2017-07-06 12:06:41 +0300 |
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committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2017-07-06 21:39:28 +0300 |
commit | d466d3c1217406b14b834335b5b4b33c0d45bd09 (patch) | |
tree | 9a012be79bd30126f336fb2b307d5328622569e8 /include/linux/fpga/fpga-bridge.h | |
parent | a7b8829d242b1a58107e9c02b09e93aec446d55c (diff) | |
download | linux-d466d3c1217406b14b834335b5b4b33c0d45bd09.tar.xz |
iio: adc: vf610_adc: Fix VALT selection value for REFSEL bits
In order to select the alternate voltage reference pair (VALTH/VALTL), the
right value for the REFSEL field in the ADCx_CFG register is "01", leading
to 0x800 as register mask. See section 8.2.6.4 in the reference manual[1].
[1] http://www.nxp.com/docs/en/reference-manual/VFXXXRM.pdf
Fixes: a775427632fd ("iio:adc:imx: add Freescale Vybrid vf610 adc driver")
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'include/linux/fpga/fpga-bridge.h')
0 files changed, 0 insertions, 0 deletions