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| author | Tim Gore <tim.gore@intel.com> | 2016-03-21 17:37:29 +0300 |
|---|---|---|
| committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2016-04-11 13:59:43 +0300 |
| commit | b1e429fe3ba7b10b8c6875b6dec1d62e1c252729 (patch) | |
| tree | 5d71d4ac8a53a1c243439444a52d4d97d78bd54e /include/linux/errqueue.h | |
| parent | 25a56705332add0363e47b3a0eca001d6fbd5bec (diff) | |
| download | linux-b1e429fe3ba7b10b8c6875b6dec1d62e1c252729.tar.xz | |
drm/i915: implement WaClearTdlStateAckDirtyBits
This is to fix a GPU hang seen with mid thread pre-emption
and pooled EUs.
v2. Use IS_BXT_REVID instead of IS_BROXTON and INTEL_REVID
v3. And use correct type for register addresses
Signed-off-by: Tim Gore <tim.gore@intel.com>
Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458571049-854-1-git-send-email-tim.gore@intel.com
Diffstat (limited to 'include/linux/errqueue.h')
0 files changed, 0 insertions, 0 deletions