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| author | Ivan Vecera <ivecera@redhat.com> | 2026-03-15 20:42:21 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2026-03-18 05:05:12 +0300 |
| commit | 3032e95987fa0da656ce3a5eb454674e7cc60a12 (patch) | |
| tree | da415bd65d9df2c5e3a9939d89bde31e6794a923 /include/linux/errqueue.h | |
| parent | 05ea2ab3b10075e8fcfcd5e283e486df7055de5e (diff) | |
| download | linux-3032e95987fa0da656ce3a5eb454674e7cc60a12.tar.xz | |
dpll: zl3073x: introduce zl3073x_chan for DPLL channel state
Extract DPLL channel state management into a dedicated zl3073x_chan
module, following the pattern already established by zl3073x_ref,
zl3073x_out and zl3073x_synth.
The new struct zl3073x_chan caches the raw mode_refsel register value
in a cfg group with inline getters and setters to extract and update
the bitfields. Three standard state management functions are provided:
- zl3073x_chan_state_fetch: read the mode_refsel register from HW
- zl3073x_chan_state_get: return cached channel state
- zl3073x_chan_state_set: write changed state to HW, skip if unchanged
The channel state array chan[ZL3073X_MAX_CHANNELS] is added to struct
zl3073x_dev. Channel state is fetched as part of
zl3073x_dev_state_fetch, using the chip-specific channel count.
The refsel_mode and forced_ref fields are removed from struct
zl3073x_dpll and all direct register accesses in dpll.c are replaced
with the new chan state operations.
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
Link: https://patch.msgid.link/20260315174224.399074-4-ivecera@redhat.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include/linux/errqueue.h')
0 files changed, 0 insertions, 0 deletions
