ASoC: rockchip: spdif: Reorder clock enable sequence

Enable the 'hclk' bus clock before the 'mclk' controller clock during
runtime resume.
The bus clock provides the register access interface, so enable it before
the controller clock. This also makes the resume sequence the reverse of
the suspend sequence, which keeps the clock ordering consistent.

Signed-off-by: bui duc phuc <phucduc.bui@gmail.com>
Link: https://patch.msgid.link/20260602101608.45137-3-phucduc.bui@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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