diff options
| author | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2019-04-02 15:50:51 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2019-04-25 22:34:03 +0300 |
| commit | e4cfb823bd71c785fe482e4d7491ef04ac561a7d (patch) | |
| tree | 54f8cec6f17340410d8b8ebcf2fe30ad4bfa585d /include/linux/clk | |
| parent | cb4f4949b1c76f29ca804d6ecd879a2e84c88afc (diff) | |
| download | linux-e4cfb823bd71c785fe482e4d7491ef04ac561a7d.tar.xz | |
clk: at91: allow configuring generated PCR layout
The PCR register layout for GCLKCSS is changing for the future SoCs, allow
configuring it.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/linux/clk')
| -rw-r--r-- | include/linux/clk/at91_pmc.h | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h index b97b8dcbffe6..31f00ebf1315 100644 --- a/include/linux/clk/at91_pmc.h +++ b/include/linux/clk/at91_pmc.h @@ -187,13 +187,8 @@ #define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9 and SAMA5] */ #define AT91_PMC_PCR_PID_MASK 0x3f -#define AT91_PMC_PCR_GCKCSS_OFFSET 8 -#define AT91_PMC_PCR_GCKCSS_MASK (0x7 << AT91_PMC_PCR_GCKCSS_OFFSET) -#define AT91_PMC_PCR_GCKCSS(n) ((n) << AT91_PMC_PCR_GCKCSS_OFFSET) /* GCK Clock Source Selection */ #define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */ -#define AT91_PMC_PCR_GCKDIV_OFFSET 20 -#define AT91_PMC_PCR_GCKDIV_MASK (0xff << AT91_PMC_PCR_GCKDIV_OFFSET) -#define AT91_PMC_PCR_GCKDIV(n) ((n) << AT91_PMC_PCR_GCKDIV_OFFSET) /* Generated Clock Divisor Value */ +#define AT91_PMC_PCR_GCKDIV_MASK GENMASK(27, 20) #define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */ #define AT91_PMC_PCR_GCKEN (0x1 << 29) /* GCK Enable */ |