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authorZhi Wang <zhi.a.wang@intel.com>2018-05-14 00:19:07 +0300
committerZhi Wang <zhi.a.wang@intel.com>2018-05-14 00:22:01 +0300
commitbba9525520b6028ecbe7486e13216e9ede8636be (patch)
treef82f4f2adecf6f97933c88050682d44336db783e /include/linux/byteorder
parentcb8ba171ae6c1e4f5fa027162c06d50fc2b43055 (diff)
parent0c79f9cb77eae28d48a4f9fc1b3341aacbbd260c (diff)
downloadlinux-bba9525520b6028ecbe7486e13216e9ede8636be.tar.xz
Merge branch 'drm-intel-next-queued' into gvt-next
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Diffstat (limited to 'include/linux/byteorder')
-rw-r--r--include/linux/byteorder/generic.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/include/linux/byteorder/generic.h b/include/linux/byteorder/generic.h
index 451aaa0786ae..4b13e0a3e15b 100644
--- a/include/linux/byteorder/generic.h
+++ b/include/linux/byteorder/generic.h
@@ -156,6 +156,23 @@ static inline void le64_add_cpu(__le64 *var, u64 val)
*var = cpu_to_le64(le64_to_cpu(*var) + val);
}
+/* XXX: this stuff can be optimized */
+static inline void le32_to_cpu_array(u32 *buf, unsigned int words)
+{
+ while (words--) {
+ __le32_to_cpus(buf);
+ buf++;
+ }
+}
+
+static inline void cpu_to_le32_array(u32 *buf, unsigned int words)
+{
+ while (words--) {
+ __cpu_to_le32s(buf);
+ buf++;
+ }
+}
+
static inline void be16_add_cpu(__be16 *var, u16 val)
{
*var = cpu_to_be16(be16_to_cpu(*var) + val);