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authorAlex Deucher <alexander.deucher@amd.com>2018-09-13 23:41:57 +0300
committerAlex Deucher <alexander.deucher@amd.com>2018-09-14 17:38:03 +0300
commit741deade2a704a434bd5939118c43d38e9ddac25 (patch)
tree403036d4b55161c6d968ff2593e5ddfd47eb81eb /include/drm
parent23ecdc6187ef74e00b78e889446a309628719b6e (diff)
downloadlinux-741deade2a704a434bd5939118c43d38e9ddac25.tar.xz
drm/amdgpu: simplify Raven, Raven2, and Picasso handling
Treat them all as Raven rather than adding a new picasso asic type. This simplifies a lot of code and also handles the case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu fw handling for picasso. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/amd_asic_type.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h
index 5644fc679d6f..dd63d08cc54e 100644
--- a/include/drm/amd_asic_type.h
+++ b/include/drm/amd_asic_type.h
@@ -49,7 +49,6 @@ enum amd_asic_type {
CHIP_VEGA12,
CHIP_VEGA20,
CHIP_RAVEN,
- CHIP_PICASSO,
CHIP_LAST,
};