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| author | Weihang Li <liweihang@hisilicon.com> | 2019-02-20 05:32:45 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2019-02-22 03:29:04 +0300 |
| commit | 747fc3f351baa061b41a1e2a81821bc963e4f794 (patch) | |
| tree | ee2ef34bd4f2fd791442a4d8d5bc6037f506b323 /include/crypto/xts.h | |
| parent | 3d69e59f42bdd57c2a185da52f9579c33dec7121 (diff) | |
| download | linux-747fc3f351baa061b41a1e2a81821bc963e4f794.tar.xz | |
net: hns3: some bugfix of ppu(rcb) ras errors
The 3rd and 4th of PPU(RCB) PF Abnormal is RAS errors instead of MSI-X
like other bits. This patch adds process of handling and logging this
two bits. Otherwise, this patch modifies print message of 28th and 29th
bit of PPU MPF Abnormal errors, which keep same with other errors now.
Fixes: f69b10b317f9 ("net: hns3: handle hw errors of PPU(RCB)")
Signed-off-by: Weihang Li <liweihang@hisilicon.com>
Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/crypto/xts.h')
0 files changed, 0 insertions, 0 deletions