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authorLinus Torvalds <torvalds@linux-foundation.org>2026-04-24 21:59:46 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2026-04-24 21:59:46 +0300
commitd0fc5bf9fe9b89389287846f13cc4e462a89954d (patch)
treebc927286a49c97539d1be06403ccc2da77d8b648 /drivers
parent1fe93b2a2ace9bba2cb90920f9300834e537665c (diff)
parente31eee4a961077d60ef2362507240c6743c1c2ae (diff)
downloadlinux-d0fc5bf9fe9b89389287846f13cc4e462a89954d.tar.xz
Merge tag 'gpio-fixes-for-v7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
Pull gpio fixes from Bartosz Golaszewski: - fix a regression in gpio-rockchip introduced on older chips during the merge window when converting to dynamic GPIO base - fix AST2700 debounce selector bit definitions in gpio-aspeed * tag 'gpio-fixes-for-v7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: gpio: aspeed: fix AST2700 debounce selector bit definitions gpio: rockchip: Fix GPIO regression after conversion to dynamic base allocation
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpio/gpio-aspeed.c4
-rw-r--r--drivers/gpio/gpio-rockchip.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
index e6af7f3fba5e..dc53b2decb66 100644
--- a/drivers/gpio/gpio-aspeed.c
+++ b/drivers/gpio/gpio-aspeed.c
@@ -42,8 +42,8 @@
#define GPIO_G7_CTRL_IRQ_TYPE1 BIT(4)
#define GPIO_G7_CTRL_IRQ_TYPE2 BIT(5)
#define GPIO_G7_CTRL_RST_TOLERANCE BIT(6)
-#define GPIO_G7_CTRL_DEBOUNCE_SEL1 BIT(7)
-#define GPIO_G7_CTRL_DEBOUNCE_SEL2 BIT(8)
+#define GPIO_G7_CTRL_DEBOUNCE_SEL2 BIT(7)
+#define GPIO_G7_CTRL_DEBOUNCE_SEL1 BIT(8)
#define GPIO_G7_CTRL_INPUT_MASK BIT(9)
#define GPIO_G7_CTRL_IRQ_STS BIT(12)
#define GPIO_G7_CTRL_IN_DATA BIT(13)
diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
index 08ea64434f8f..44d7ebd12724 100644
--- a/drivers/gpio/gpio-rockchip.c
+++ b/drivers/gpio/gpio-rockchip.c
@@ -617,7 +617,7 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
return -ENODEV;
ret = gpiochip_add_pin_range(gc, dev_name(pctldev->dev), 0,
- gc->base, gc->ngpio);
+ bank->pin_base, bank->nr_pins);
if (ret) {
dev_err(bank->dev, "Failed to add pin range\n");
goto fail;