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authorMåns Andersson <mans.andersson@nibe.se>2017-01-23 13:28:10 +0300
committerMark Brown <broonie@kernel.org>2017-01-23 20:48:55 +0300
commitb4c2e158a1e1be38ce95366cf85b151fb6bd8e47 (patch)
tree86b5124968519141142cbe36e3bad42e62149d58 /drivers
parentd00b74613fb18dfd0a5aa99270ee2e72d5c808d7 (diff)
downloadlinux-b4c2e158a1e1be38ce95366cf85b151fb6bd8e47.tar.xz
regulator: tps65217: Allow DCDC1 and DCDC3 up to 3.3V
The data sheet statement that DCDC1 and DCDC3 only can be set in the range 0.9V - 1.5V refers to storage on its internal EEPROM and therefore cold boot configuration. After power-on the device can be reconfigured over i2c and DCDC1/3 set up to 3.3V. Signed-off-by: Måns Andersson <mans.andersson@nibe.se> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/regulator/tps65217-regulator.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/regulator/tps65217-regulator.c b/drivers/regulator/tps65217-regulator.c
index 2d12b9af3540..5324dc9e6d6e 100644
--- a/drivers/regulator/tps65217-regulator.c
+++ b/drivers/regulator/tps65217-regulator.c
@@ -179,7 +179,8 @@ static const struct regulator_desc regulators[] = {
TPS65217_REGULATOR("DCDC1", TPS65217_DCDC_1, "dcdc1",
tps65217_pmic_ops, 64, TPS65217_REG_DEFDCDC1,
TPS65217_DEFDCDCX_DCDC_MASK, TPS65217_ENABLE_DC1_EN,
- NULL, tps65217_uv1_ranges, 2, TPS65217_REG_SEQ1,
+ NULL, tps65217_uv1_ranges,
+ ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ1,
TPS65217_SEQ1_DC1_SEQ_MASK),
TPS65217_REGULATOR("DCDC2", TPS65217_DCDC_2, "dcdc2",
tps65217_pmic_ops, 64, TPS65217_REG_DEFDCDC2,
@@ -190,7 +191,8 @@ static const struct regulator_desc regulators[] = {
TPS65217_REGULATOR("DCDC3", TPS65217_DCDC_3, "dcdc3",
tps65217_pmic_ops, 64, TPS65217_REG_DEFDCDC3,
TPS65217_DEFDCDCX_DCDC_MASK, TPS65217_ENABLE_DC3_EN,
- NULL, tps65217_uv1_ranges, 1, TPS65217_REG_SEQ2,
+ NULL, tps65217_uv1_ranges,
+ ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ2,
TPS65217_SEQ2_DC3_SEQ_MASK),
TPS65217_REGULATOR("LDO1", TPS65217_LDO_1, "ldo1",
tps65217_pmic_ldo1_ops, 16, TPS65217_REG_DEFLDO1,