diff options
| author | Ivan Vecera <ivecera@redhat.com> | 2026-04-08 13:27:13 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2026-04-12 18:27:33 +0300 |
| commit | 737cb6195c40acf67c876f509e209158436cf287 (patch) | |
| tree | c7345bec0043424a8ad5bc7bcbea9878a6451b47 /drivers | |
| parent | 3c8c39768b10867e4f630080785b602245f01760 (diff) | |
| download | linux-737cb6195c40acf67c876f509e209158436cf287.tar.xz | |
dpll: zl3073x: use FIELD_MODIFY() for clear-and-set patterns
Replace open-coded clear-and-set bitfield operations with
FIELD_MODIFY().
Reviewed-by: Petr Oros <poros@redhat.com>
Reviewed-by: Prathosh Satish <Prathosh.Satish@microchip.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
Link: https://patch.msgid.link/20260408102716.443099-3-ivecera@redhat.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/dpll/zl3073x/chan.h | 17 | ||||
| -rw-r--r-- | drivers/dpll/zl3073x/core.c | 3 | ||||
| -rw-r--r-- | drivers/dpll/zl3073x/flash.c | 3 |
3 files changed, 8 insertions, 15 deletions
diff --git a/drivers/dpll/zl3073x/chan.h b/drivers/dpll/zl3073x/chan.h index e0f02d343208..481da2133202 100644 --- a/drivers/dpll/zl3073x/chan.h +++ b/drivers/dpll/zl3073x/chan.h @@ -66,8 +66,7 @@ static inline u8 zl3073x_chan_ref_get(const struct zl3073x_chan *chan) */ static inline void zl3073x_chan_mode_set(struct zl3073x_chan *chan, u8 mode) { - chan->mode_refsel &= ~ZL_DPLL_MODE_REFSEL_MODE; - chan->mode_refsel |= FIELD_PREP(ZL_DPLL_MODE_REFSEL_MODE, mode); + FIELD_MODIFY(ZL_DPLL_MODE_REFSEL_MODE, &chan->mode_refsel, mode); } /** @@ -77,8 +76,7 @@ static inline void zl3073x_chan_mode_set(struct zl3073x_chan *chan, u8 mode) */ static inline void zl3073x_chan_ref_set(struct zl3073x_chan *chan, u8 ref) { - chan->mode_refsel &= ~ZL_DPLL_MODE_REFSEL_REF; - chan->mode_refsel |= FIELD_PREP(ZL_DPLL_MODE_REFSEL_REF, ref); + FIELD_MODIFY(ZL_DPLL_MODE_REFSEL_REF, &chan->mode_refsel, ref); } /** @@ -110,13 +108,10 @@ zl3073x_chan_ref_prio_set(struct zl3073x_chan *chan, u8 ref, u8 prio) { u8 *val = &chan->ref_prio[ref / 2]; - if (!(ref & 1)) { - *val &= ~ZL_DPLL_REF_PRIO_REF_P; - *val |= FIELD_PREP(ZL_DPLL_REF_PRIO_REF_P, prio); - } else { - *val &= ~ZL_DPLL_REF_PRIO_REF_N; - *val |= FIELD_PREP(ZL_DPLL_REF_PRIO_REF_N, prio); - } + if (!(ref & 1)) + FIELD_MODIFY(ZL_DPLL_REF_PRIO_REF_P, val, prio); + else + FIELD_MODIFY(ZL_DPLL_REF_PRIO_REF_N, val, prio); } /** diff --git a/drivers/dpll/zl3073x/core.c b/drivers/dpll/zl3073x/core.c index cb47a5db061a..5f1e70f3e40a 100644 --- a/drivers/dpll/zl3073x/core.c +++ b/drivers/dpll/zl3073x/core.c @@ -805,8 +805,7 @@ int zl3073x_dev_phase_avg_factor_set(struct zl3073x_dev *zldev, u8 factor) value = (factor + 1) & 0x0f; /* Update phase measurement control register */ - dpll_meas_ctrl &= ~ZL_DPLL_MEAS_CTRL_AVG_FACTOR; - dpll_meas_ctrl |= FIELD_PREP(ZL_DPLL_MEAS_CTRL_AVG_FACTOR, value); + FIELD_MODIFY(ZL_DPLL_MEAS_CTRL_AVG_FACTOR, &dpll_meas_ctrl, value); rc = zl3073x_write_u8(zldev, ZL_REG_DPLL_MEAS_CTRL, dpll_meas_ctrl); if (rc) return rc; diff --git a/drivers/dpll/zl3073x/flash.c b/drivers/dpll/zl3073x/flash.c index 83452a77e3e9..f85535c8ad24 100644 --- a/drivers/dpll/zl3073x/flash.c +++ b/drivers/dpll/zl3073x/flash.c @@ -194,8 +194,7 @@ zl3073x_flash_cmd_wait(struct zl3073x_dev *zldev, u32 operation, if (rc) return rc; - value &= ~ZL_WRITE_FLASH_OP; - value |= FIELD_PREP(ZL_WRITE_FLASH_OP, operation); + FIELD_MODIFY(ZL_WRITE_FLASH_OP, &value, operation); rc = zl3073x_write_u8(zldev, ZL_REG_WRITE_FLASH, value); if (rc) |