diff options
| author | Felix Radensky <felix@embedded-sol.com> | 2010-03-28 17:02:02 +0400 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-05-22 01:43:45 +0400 |
| commit | 3322340a9db2251ac9d09bc7b8d49e872298ae95 (patch) | |
| tree | 40c24330b6acd953d49e827e051bae7d761ec102 /drivers | |
| parent | a02ce953a14d6a8aab721b129b3c8ff4981a76e6 (diff) | |
| download | linux-3322340a9db2251ac9d09bc7b8d49e872298ae95.tar.xz | |
PCI: Allow manual resource allocation for PCI hotplug bridges
At the moment only PCI-E briges can be flagged as hotplug, thus
allowing manual resource preallocation via pci=hpmemsize=nnM and
pci=hpiosize=nnM kernel parameters. Some PCI hotplug bridges, e.g.
PLX 6254 can also benefit from this functionalily, as kernel fails
to properly allocate their resources when hotplug device is added
and PCI bus is rescanned.
This patch adds header quirk for PLX 6254 that marks this bridge
as hotplug. Other PCI bridges with similar problems can use it
as well.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pci/quirks.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index e5861d5a2e4d..b7512cf08c58 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -2554,6 +2554,19 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1518, quirk_i82576_sriov); #endif /* CONFIG_PCI_IOV */ +/* Allow manual resource allocation for PCI hotplug bridges + * via pci=hpmemsize=nnM and pci=hpiosize=nnM parameters. For + * some PCI-PCI hotplug bridges, like PLX 6254 (former HINT HB6), + * kernel fails to allocate resources when hotplug device is + * inserted and PCI bus is rescanned. + */ +static void __devinit quirk_hotplug_bridge(struct pci_dev *dev) +{ + dev->is_hotplug_bridge = 1; +} + +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HINT, 0x0020, quirk_hotplug_bridge); + /* * This is a quirk for the Ricoh MMC controller found as a part of * some mulifunction chips. |