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| author | Zhang Qilong <zhangqilong3@huawei.com> | 2022-09-24 15:13:07 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2022-09-26 18:10:35 +0300 |
| commit | 4d0ef0a1c35189a6e8377d8ee8310ea5ef22c5f3 (patch) | |
| tree | 94370b231ff7873d7d66adf778ae6a2b634fc6a9 /drivers/spi/spi-cadence-quadspi.c | |
| parent | a6bfc42f30d11f22d2dacb2362d6069643b15393 (diff) | |
| download | linux-4d0ef0a1c35189a6e8377d8ee8310ea5ef22c5f3.tar.xz | |
spi: cadence-quadspi: Fix PM disable depth imbalance in cqspi_probe
The pm_runtime_enable will increase power disable depth. Thus
a pairing decrement is needed on the error handling path to
keep it balanced according to context.
Fixes:73d5fe0462702 ("spi: cadence-quadspi: Remove spi_master_put() in probe failure path")
Signed-off-by: Zhang Qilong <zhangqilong3@huawei.com>
Link: https://lore.kernel.org/r/20220924121310.78331-2-zhangqilong3@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-cadence-quadspi.c')
| -rw-r--r-- | drivers/spi/spi-cadence-quadspi.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 72b1a5a2298c..106c09ffa425 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1619,7 +1619,7 @@ static int cqspi_probe(struct platform_device *pdev) pm_runtime_enable(dev); ret = pm_runtime_resume_and_get(dev); if (ret < 0) - return ret; + goto probe_pm_failed; ret = clk_prepare_enable(cqspi->clk); if (ret) { @@ -1712,6 +1712,7 @@ probe_reset_failed: clk_disable_unprepare(cqspi->clk); probe_clk_failed: pm_runtime_put_sync(dev); +probe_pm_failed: pm_runtime_disable(dev); return ret; } |