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authorZhang Rui <rui.zhang@intel.com>2019-07-10 16:44:31 +0300
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2019-07-11 16:08:58 +0300
commitd978e755aabe215cb67bf713e103ed3916ec306d (patch)
tree371050d318bd1f1ae3333611e50ebfa5fa4899b3 /drivers/powercap/intel_rapl_msr.c
parent3382388d714891fc0f575926189f33d22e7c960b (diff)
downloadlinux-d978e755aabe215cb67bf713e103ed3916ec306d.tar.xz
intel_rapl: support 64 bit register
RAPL MMIO interface uses 64 bit registers, thus force use 64 bit register for all the RAPL code. Reviewed-by: Pandruvada, Srinivas <srinivas.pandruvada@intel.com> Tested-by: Pandruvada, Srinivas <srinivas.pandruvada@intel.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/powercap/intel_rapl_msr.c')
-rw-r--r--drivers/powercap/intel_rapl_msr.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rapl_msr.c
index 89645222e3e0..6cd8a8fb9238 100644
--- a/drivers/powercap/intel_rapl_msr.c
+++ b/drivers/powercap/intel_rapl_msr.c
@@ -84,8 +84,10 @@ static int rapl_cpu_down_prep(unsigned int cpu)
static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
{
- if (rdmsrl_safe_on_cpu(cpu, ra->reg, &ra->value)) {
- pr_debug("failed to read msr 0x%x on cpu %d\n", ra->reg, cpu);
+ u32 msr = (u32)ra->reg;
+
+ if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) {
+ pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
return -EIO;
}
ra->value &= ra->mask;
@@ -95,16 +97,17 @@ static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
static void rapl_msr_update_func(void *info)
{
struct reg_action *ra = info;
+ u32 msr = (u32)ra->reg;
u64 val;
- ra->err = rdmsrl_safe(ra->reg, &val);
+ ra->err = rdmsrl_safe(msr, &val);
if (ra->err)
return;
val &= ~ra->mask;
val |= ra->value;
- ra->err = wrmsrl_safe(ra->reg, val);
+ ra->err = wrmsrl_safe(msr, val);
}
static int rapl_msr_write_raw(int cpu, struct reg_action *ra)