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| author | Tariq Toukan <tariqt@nvidia.com> | 2025-09-22 09:06:30 +0300 |
|---|---|---|
| committer | Leon Romanovsky <leon@kernel.org> | 2025-09-28 10:36:36 +0300 |
| commit | 1ddf1636e0e058adf2231486da0419243eb49539 (patch) | |
| tree | e74f1ce99733b76ff9f0fa096500446eca2eb03c /drivers/platform/x86/intel/pmt/class.c | |
| parent | a3d076b0567e729d5f21a95525c4d096b1f59e79 (diff) | |
| download | linux-1ddf1636e0e058adf2231486da0419243eb49539.tar.xz | |
net/mlx5: Add IFC bit for TIR/SQ order capability
Before this cap, firmware requested a certain creation order between TIR
objects and SQs of the same transport domain to properly support the
self loopback prevention feature. If order is not preserved, explicit
modify_tir operations are necessary after the opening of the SQs.
When set, this cap bit indicates that this firmware requirement /
limitation no longer holds.
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/1758521191-814350-2-git-send-email-tariqt@nvidia.com
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Diffstat (limited to 'drivers/platform/x86/intel/pmt/class.c')
0 files changed, 0 insertions, 0 deletions