diff options
| author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2021-10-06 14:10:04 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2021-10-13 03:13:47 +0300 |
| commit | 290e2d18caabcf9b7cefdcc64e91a0080c802a97 (patch) | |
| tree | 5b9c43a9b53c583fd85aa88a77b2816542b1db43 /drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c | |
| parent | 83917856334e88f4944a424860d94c134de88b51 (diff) | |
| download | linux-290e2d18caabcf9b7cefdcc64e91a0080c802a97.tar.xz | |
pinctrl: uniphier: Add extra audio pinmux settings for LD11, LD20 and PXs3 SoCs
Add extra audio I/O pinmux setting for LD11, LD20 and PXs3 SoCs.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1633518606-8298-2-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c')
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c index 2b388fdcca3a..4810db6c0ee8 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c @@ -767,6 +767,22 @@ static const struct pinctrl_pin_desc uniphier_pxs3_pins[] = { 250, UNIPHIER_PIN_PULL_DOWN), }; +static const unsigned ain1_pins[] = {186, 187, 188, 189, 237, 238, 239}; +static const int ain1_muxvals[] = {0, 0, 0, 0, 1, 1, 1}; +static const unsigned ain2_pins[] = {243, 244, 245, 246, 247, 248, 249}; +static const int ain2_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; +static const unsigned aout1_pins[] = {226, 227, 228, 229, 230, 231, 232}; +static const int aout1_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; +static const unsigned aout2_pins[] = {192, 193, 194, 195, 196, 197, 198}; +static const int aout2_muxvals[] = {0, 0, 0, 0, 0, 0, 0}; +static const unsigned aout3_pins[] = {199, 200, 201, 202}; +static const int aout3_muxvals[] = {0, 0, 0, 0}; +static const unsigned ainiec1_pins[] = {240}; +static const int ainiec1_muxvals[] = {1}; +static const unsigned aoutiec1_pins[] = {190}; +static const int aoutiec1_muxvals[] = {0}; +static const unsigned aoutiec2_pins[] = {191}; +static const int aoutiec2_muxvals[] = {0}; static const unsigned int emmc_pins[] = {32, 33, 34, 35, 36, 37, 38}; static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0}; static const unsigned int emmc_dat8_pins[] = {39, 40, 41, 42}; @@ -871,6 +887,14 @@ static const unsigned int gpio_range2_pins[] = { }; static const struct uniphier_pinctrl_group uniphier_pxs3_groups[] = { + UNIPHIER_PINCTRL_GROUP(ain1), + UNIPHIER_PINCTRL_GROUP(ain2), + UNIPHIER_PINCTRL_GROUP(aout1), + UNIPHIER_PINCTRL_GROUP(aout2), + UNIPHIER_PINCTRL_GROUP(aout3), + UNIPHIER_PINCTRL_GROUP(ainiec1), + UNIPHIER_PINCTRL_GROUP(aoutiec1), + UNIPHIER_PINCTRL_GROUP(aoutiec2), UNIPHIER_PINCTRL_GROUP(emmc), UNIPHIER_PINCTRL_GROUP(emmc_dat8), UNIPHIER_PINCTRL_GROUP(ether_rgmii), @@ -902,6 +926,14 @@ static const struct uniphier_pinctrl_group uniphier_pxs3_groups[] = { UNIPHIER_PINCTRL_GROUP_GPIO(gpio_range2), }; +static const char * const ain1_groups[] = {"ain1"}; +static const char * const ain2_groups[] = {"ain2"}; +static const char * const aout1_groups[] = {"aout1"}; +static const char * const aout2_groups[] = {"aout2"}; +static const char * const aout3_groups[] = {"aout3"}; +static const char * const ainiec1_groups[] = {"ainiec1"}; +static const char * const aoutiec1_groups[] = {"aoutiec1"}; +static const char * const aoutiec2_groups[] = {"aoutiec2"}; static const char * const emmc_groups[] = {"emmc", "emmc_dat8"}; static const char * const ether_rgmii_groups[] = {"ether_rgmii"}; static const char * const ether_rmii_groups[] = {"ether_rmii"}; @@ -928,6 +960,14 @@ static const char * const usb2_groups[] = {"usb2"}; static const char * const usb3_groups[] = {"usb3"}; static const struct uniphier_pinmux_function uniphier_pxs3_functions[] = { + UNIPHIER_PINMUX_FUNCTION(ain1), + UNIPHIER_PINMUX_FUNCTION(ain2), + UNIPHIER_PINMUX_FUNCTION(aout1), + UNIPHIER_PINMUX_FUNCTION(aout2), + UNIPHIER_PINMUX_FUNCTION(aout3), + UNIPHIER_PINMUX_FUNCTION(ainiec1), + UNIPHIER_PINMUX_FUNCTION(aoutiec1), + UNIPHIER_PINMUX_FUNCTION(aoutiec2), UNIPHIER_PINMUX_FUNCTION(emmc), UNIPHIER_PINMUX_FUNCTION(ether_rgmii), UNIPHIER_PINMUX_FUNCTION(ether_rmii), |