summaryrefslogtreecommitdiff
path: root/drivers/pinctrl/nxp
diff options
context:
space:
mode:
authorAndrei Stefanescu <andrei.stefanescu@oss.nxp.com>2024-07-23 16:18:32 +0300
committerLinus Walleij <linus.walleij@linaro.org>2024-08-05 11:17:43 +0300
commit0274d8098291d87f61f1f8e5b22214abb5324669 (patch)
tree5658631c85435a60293a24733bbdc883b13fa648 /drivers/pinctrl/nxp
parent522875e09ba5ca59d39040b3536f48540c177636 (diff)
downloadlinux-0274d8098291d87f61f1f8e5b22214abb5324669.tar.xz
pinctrl: s32cc: add update and overwrite options when setting pinconf
The previous pinconf settings(made by the bootloader) need to be overwritten when configuring the pinctrl of a driver during the boot process. Configuring the bias of a GPIO at runtime (e.g. pull-up) needs to preserve the other settings unaltered. This patch introduces changes to differentiate between the two cases. Signed-off-by: Radu Pirea <radu-nicolae.pirea@nxp.com> Signed-off-by: Florin Buica <florin.buica@nxp.com> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com> Link: https://lore.kernel.org/20240723131832.1171036-4-andrei.stefanescu@oss.nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/nxp')
-rw-r--r--drivers/pinctrl/nxp/pinctrl-s32cc.c30
1 files changed, 23 insertions, 7 deletions
diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c
index f0430354e832..501eb296c760 100644
--- a/drivers/pinctrl/nxp/pinctrl-s32cc.c
+++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c
@@ -39,6 +39,11 @@
#define S32_MSCR_ODE BIT(20)
#define S32_MSCR_OBE BIT(21)
+enum s32_write_type {
+ S32_PINCONF_UPDATE_ONLY,
+ S32_PINCONF_OVERWRITE,
+};
+
static struct regmap_config s32_regmap_config = {
.reg_bits = 32,
.val_bits = 32,
@@ -552,10 +557,11 @@ static int s32_parse_pincfg(unsigned long pincfg, unsigned int *mask,
return 0;
}
-static int s32_pinconf_mscr_update(struct pinctrl_dev *pctldev,
+static int s32_pinconf_mscr_write(struct pinctrl_dev *pctldev,
unsigned int pin_id,
unsigned long *configs,
- unsigned int num_configs)
+ unsigned int num_configs,
+ enum s32_write_type write_type)
{
struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
unsigned int config = 0, mask = 0;
@@ -574,10 +580,20 @@ static int s32_pinconf_mscr_update(struct pinctrl_dev *pctldev,
return ret;
}
+ /* If the MSCR configuration has to be written,
+ * the SSS field should not be touched.
+ */
+ if (write_type == S32_PINCONF_OVERWRITE)
+ mask = (unsigned int)~S32_MSCR_SSS_MASK;
+
if (!config && !mask)
return 0;
- dev_dbg(ipctl->dev, "update: pin %u cfg 0x%x\n", pin_id, config);
+ if (write_type == S32_PINCONF_OVERWRITE)
+ dev_dbg(ipctl->dev, "set: pin %u cfg 0x%x\n", pin_id, config);
+ else
+ dev_dbg(ipctl->dev, "update: pin %u cfg 0x%x\n", pin_id,
+ config);
return s32_regmap_update(pctldev, pin_id, mask, config);
}
@@ -593,8 +609,8 @@ static int s32_pinconf_set(struct pinctrl_dev *pctldev,
unsigned int pin_id, unsigned long *configs,
unsigned int num_configs)
{
- return s32_pinconf_mscr_update(pctldev, pin_id, configs,
- num_configs);
+ return s32_pinconf_mscr_write(pctldev, pin_id, configs,
+ num_configs, S32_PINCONF_UPDATE_ONLY);
}
static int s32_pconf_group_set(struct pinctrl_dev *pctldev, unsigned int selector,
@@ -607,8 +623,8 @@ static int s32_pconf_group_set(struct pinctrl_dev *pctldev, unsigned int selecto
grp = &info->groups[selector];
for (i = 0; i < grp->data.npins; i++) {
- ret = s32_pinconf_mscr_update(pctldev, grp->data.pins[i],
- configs, num_configs);
+ ret = s32_pinconf_mscr_write(pctldev, grp->data.pins[i],
+ configs, num_configs, S32_PINCONF_OVERWRITE);
if (ret)
return ret;
}