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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2022-11-08 17:09:31 +0300 |
|---|---|---|
| committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2022-11-08 17:28:17 +0300 |
| commit | b14ef61314b37a4a720a1f5686627d5061387480 (patch) | |
| tree | 55bdb647d70fba2d94367a253907f90580886d6b /drivers/pinctrl/intel/Kconfig | |
| parent | 3886bc3523db24814c98c57d74fe66d7a21bf40b (diff) | |
| download | linux-b14ef61314b37a4a720a1f5686627d5061387480.tar.xz | |
pinctrl: intel: Add Intel Moorefield pin controller support
This driver adds pinctrl support for Intel Moorefield. The IP block
which is called Family-Level Interface Shim is a separate entity in SoC.
The GPIO driver, which supports this pinctrl interface, will be
submitted separately.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'drivers/pinctrl/intel/Kconfig')
| -rw-r--r-- | drivers/pinctrl/intel/Kconfig | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig index 078eec8af4a4..b3ec00624416 100644 --- a/drivers/pinctrl/intel/Kconfig +++ b/drivers/pinctrl/intel/Kconfig @@ -47,6 +47,17 @@ config PINCTRL_MERRIFIELD interface that allows configuring of SoC pins and using them as GPIOs. +config PINCTRL_MOOREFIELD + tristate "Intel Moorefield pinctrl driver" + depends on X86_INTEL_MID + select PINMUX + select PINCONF + select GENERIC_PINCONF + help + Moorefield Family-Level Interface Shim (FLIS) driver provides an + interface that allows configuring of SoC pins and using them as + GPIOs. + config PINCTRL_INTEL tristate select PINMUX |