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authorKishon Vijay Abraham I <kishon@ti.com>2020-12-10 15:49:17 +0300
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2020-12-10 17:37:48 +0300
commit7aa256234c4c86d8b8fa19a7647051b8fd9721d9 (patch)
tree7c42916de2d7f3847a90164efde05f9ef9155515 /drivers/pci/controller/cadence/pcie-cadence.h
parent17c5b458a99049eec6915bc4b2188b8540cc22b0 (diff)
downloadlinux-7aa256234c4c86d8b8fa19a7647051b8fd9721d9.tar.xz
PCI: j721e: Get offset within "syscon" from "ti,syscon-pcie-ctrl" phandle arg
Get "syscon" pcie_ctrl offset from the argument of "ti,syscon-pcie-ctrl" phandle. Previously a subnode to "syscon" node was added which has the exact memory mapped address of pcie_ctrl but now the offset of pcie_ctrl within "syscon" is now being passed as argument to "ti,syscon-pcie-ctrl" phandle. If the offset is not provided in "ti,syscon-pcie-ctrl", the full memory mapped address of pcie_ctrl is used in order to maintain old DT compatibility. This change is as discussed in [1] [1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com Link: https://lore.kernel.org/r/20201210124917.24185-5-kishon@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'drivers/pci/controller/cadence/pcie-cadence.h')
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