diff options
author | Lorenzo Bianconi <lorenzo@kernel.org> | 2021-03-07 21:20:49 +0300 |
---|---|---|
committer | Felix Fietkau <nbd@nbd.name> | 2021-04-12 01:01:25 +0300 |
commit | 3990465db6829c91e8ebfde51ba2d98885020249 (patch) | |
tree | 17ba6e78fbade51c1401dde250f896f9a97832ce /drivers/net/wireless/mediatek/mt76/dma.c | |
parent | 1f7396acfef4691b8cf4a3e631fd3f59d779c0f2 (diff) | |
download | linux-3990465db6829c91e8ebfde51ba2d98885020249.tar.xz |
mt76: dma: introduce mt76_dma_queue_reset routine
Introduce mt76_dma_queue_reset utility routine to reset a given hw
queue. This is a preliminary patch to introduce mt7921 chip reset
support.
Co-developed-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'drivers/net/wireless/mediatek/mt76/dma.c')
-rw-r--r-- | drivers/net/wireless/mediatek/mt76/dma.c | 46 |
1 files changed, 28 insertions, 18 deletions
diff --git a/drivers/net/wireless/mediatek/mt76/dma.c b/drivers/net/wireless/mediatek/mt76/dma.c index 6273b2cfce4f..8d4a276130cf 100644 --- a/drivers/net/wireless/mediatek/mt76/dma.c +++ b/drivers/net/wireless/mediatek/mt76/dma.c @@ -79,13 +79,38 @@ mt76_free_pending_txwi(struct mt76_dev *dev) local_bh_enable(); } +static void +mt76_dma_sync_idx(struct mt76_dev *dev, struct mt76_queue *q) +{ + writel(q->desc_dma, &q->regs->desc_base); + writel(q->ndesc, &q->regs->ring_size); + q->head = readl(&q->regs->dma_idx); + q->tail = q->head; +} + +static void +mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q) +{ + int i; + + if (!q) + return; + + /* clear descriptors */ + for (i = 0; i < q->ndesc; i++) + q->desc[i].ctrl = cpu_to_le32(MT_DMA_CTL_DMA_DONE); + + writel(0, &q->regs->cpu_idx); + writel(0, &q->regs->dma_idx); + mt76_dma_sync_idx(dev, q); +} + static int mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q, int idx, int n_desc, int bufsize, u32 ring_base) { int size; - int i; spin_lock_init(&q->lock); spin_lock_init(&q->cleanup_lock); @@ -105,14 +130,7 @@ mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q, if (!q->entry) return -ENOMEM; - /* clear descriptors */ - for (i = 0; i < q->ndesc; i++) - q->desc[i].ctrl = cpu_to_le32(MT_DMA_CTL_DMA_DONE); - - writel(q->desc_dma, &q->regs->desc_base); - writel(0, &q->regs->cpu_idx); - writel(0, &q->regs->dma_idx); - writel(q->ndesc, &q->regs->ring_size); + mt76_dma_queue_reset(dev, q); return 0; } @@ -202,15 +220,6 @@ mt76_dma_tx_cleanup_idx(struct mt76_dev *dev, struct mt76_queue *q, int idx, } static void -mt76_dma_sync_idx(struct mt76_dev *dev, struct mt76_queue *q) -{ - writel(q->desc_dma, &q->regs->desc_base); - writel(q->ndesc, &q->regs->ring_size); - q->head = readl(&q->regs->dma_idx); - q->tail = q->head; -} - -static void mt76_dma_kick_queue(struct mt76_dev *dev, struct mt76_queue *q) { wmb(); @@ -642,6 +651,7 @@ mt76_dma_init(struct mt76_dev *dev) static const struct mt76_queue_ops mt76_dma_ops = { .init = mt76_dma_init, .alloc = mt76_dma_alloc_queue, + .reset_q = mt76_dma_queue_reset, .tx_queue_skb_raw = mt76_dma_tx_queue_skb_raw, .tx_queue_skb = mt76_dma_tx_queue_skb, .tx_cleanup = mt76_dma_tx_cleanup, |