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author | Suman Anna <s-anna@ti.com> | 2015-09-30 01:37:47 +0300 |
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committer | Tero Kristo <t-kristo@ti.com> | 2015-10-02 09:24:28 +0300 |
commit | 7aba4f5201d1b7b3ddb0b03883d9edf69851ddad (patch) | |
tree | 194b532ee37040c8a2372be24b9d02d072f63675 /drivers/net/wan/z85230.c | |
parent | 19e79687de22f23bcfb5e79cce3daba20af228d1 (diff) | |
download | linux-7aba4f5201d1b7b3ddb0b03883d9edf69851ddad.tar.xz |
clk: ti: dflt: fix enable_reg validity check
The default clock enabling functions for TI clocks -
omap2_dflt_clk_enable() and omap2_dflt_clk_disable() perform a
NULL check for the enable_reg field of the clk_hw_omap structure.
This enable_reg field however is merely a combination of the index
of the master IP module, and the offset from the master IP module's
base address. A value of 0 is perfectly valid, and the current error
checking will fail in these cases. The issue was found when trying
to enable the iva2_ck clock on OMAP3 platforms.
So, switch the check to use IS_ERR. This correction is similar to the
logic used in commit c807dbedb5e5 ("clk: ti: fix ti_clk_get_reg_addr
error handling").
Fixes: 9f37e90efaf0 ("clk: ti: dflt: move support for default gate clock..")
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'drivers/net/wan/z85230.c')
0 files changed, 0 insertions, 0 deletions