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authorAlvin Šipraga <alsi@bang-olufsen.dk>2021-10-18 12:38:02 +0300
committerDavid S. Miller <davem@davemloft.net>2021-10-18 16:02:56 +0300
commit2ca2969aae1e110fe243a50d6d5809f6f4895092 (patch)
tree25de2b180cedf455546748f1975c8b36707b5fef /drivers/net/phy
parent4af2950c50c8634ed2865cf81e607034f78b84aa (diff)
downloadlinux-2ca2969aae1e110fe243a50d6d5809f6f4895092.tar.xz
net: phy: realtek: add support for RTL8365MB-VC internal PHYs
The RTL8365MB-VC ethernet switch controller has 4 internal PHYs for its user-facing ports. All that is needed is to let the PHY driver core pick up the IRQ made available by the switch driver. Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/realtek.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 11be60333fa8..a5671ab896b3 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1023,6 +1023,14 @@ static struct phy_driver realtek_drvs[] = {
.resume = genphy_resume,
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
+ }, {
+ PHY_ID_MATCH_EXACT(0x001cc942),
+ .name = "RTL8365MB-VC Gigabit Ethernet",
+ /* Interrupt handling analogous to RTL8366RB */
+ .config_intr = genphy_no_config_intr,
+ .handle_interrupt = genphy_handle_interrupt_no_ack,
+ .suspend = genphy_suspend,
+ .resume = genphy_resume,
},
};