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| author | Florian Fainelli <f.fainelli@gmail.com> | 2015-06-08 21:05:20 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2015-06-08 22:16:25 +0300 |
| commit | 6da8253bdd3945b81377e4908d6d395a9956f8af (patch) | |
| tree | 814b440c4cf2267513579c3970b6efff6584e1f6 /drivers/net/phy/bcm7xxx.c | |
| parent | 6508060232ee78200a2258aefeeb148ce9ed1526 (diff) | |
| download | linux-6da8253bdd3945b81377e4908d6d395a9956f8af.tar.xz | |
net: phy: bcm7xxx: update workaround to fix 100BaseT corner cases
Update the AFE_TX_CONFIG value to solve marginal rise/fall issues
observed when the link is operating in 100BaseT. This workaround applies
to GPHY revisions D0, E0 and newer.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/bcm7xxx.c')
| -rw-r--r-- | drivers/net/phy/bcm7xxx.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c index b5dc59de094e..4dea85bfc545 100644 --- a/drivers/net/phy/bcm7xxx.c +++ b/drivers/net/phy/bcm7xxx.c @@ -136,8 +136,8 @@ static int bcm7xxx_28nm_d0_afe_config_init(struct phy_device *phydev) /* AFE_RX_LP_COUNTER, set RX bandwidth to maximum */ phy_write_misc(phydev, AFE_RX_LP_COUNTER, 0x7fc0); - /* AFE_TX_CONFIG, set 1000BT Cfeed=110 for all ports */ - phy_write_misc(phydev, AFE_TX_CONFIG, 0x0061); + /* AFE_TX_CONFIG, set 100BT Cfeed=011 to improve rise/fall time */ + phy_write_misc(phydev, AFE_TX_CONFIG, 0x431); /* AFE_VDCA_ICTRL_0, set Iq=1101 instead of 0111 for AB symmetry */ phy_write_misc(phydev, AFE_VDCA_ICTRL_0, 0xa7da); @@ -167,6 +167,9 @@ static int bcm7xxx_28nm_e0_plus_afe_config_init(struct phy_device *phydev) /* AFE_RXCONFIG_1, provide more margin for INL/DNL measurement */ phy_write_misc(phydev, AFE_RXCONFIG_1, 0x9b2f); + /* AFE_TX_CONFIG, set 100BT Cfeed=011 to improve rise/fall time */ + phy_write_misc(phydev, AFE_TX_CONFIG, 0x431); + /* AFE_VDCA_ICTRL_0, set Iq=1101 instead of 0111 for AB symmetry */ phy_write_misc(phydev, AFE_VDCA_ICTRL_0, 0xa7da); |