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authorMaciej W. Rozycki <macro@linux-mips.org>2014-09-25 14:06:55 +0400
committerDavid S. Miller <davem@davemloft.net>2014-09-29 01:22:10 +0400
commitb98dfaf2b0a3e72fa5967dafb4f246442584a780 (patch)
tree4cc04f9085d0b1863dd6cf27e9fdc95d8b5d28cd /drivers/net/fddi/defxx.h
parentb1a6d3ecf806457d3e76ac0044db424be3c9422d (diff)
downloadlinux-b98dfaf2b0a3e72fa5967dafb4f246442584a780.tar.xz
defxx: DEFEA's ESIC port I/O decoding cleanup
Use the slot-specific I/O range for decoding accesses to PDQ ASIC registers (IOCS0) and the discrete Burst Holdoff register (IOCS1) as per the "HD64981F EISA Slave Interface Controller (ESIC)" datasheet. Use disjoint decode ranges now that the assignment of chip selects is known. Update the span of the port I/O resource requested accordingly. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/fddi/defxx.h')
-rw-r--r--drivers/net/fddi/defxx.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/net/fddi/defxx.h b/drivers/net/fddi/defxx.h
index adb63f3f7b4a..9527f0182fd4 100644
--- a/drivers/net/fddi/defxx.h
+++ b/drivers/net/fddi/defxx.h
@@ -1479,8 +1479,10 @@ typedef union
/* Define EISA controller register offsets */
-#define PI_ESIC_K_CSR_IO_LEN 0x80 /* 128 bytes */
+#define PI_ESIC_K_CSR_IO_LEN 0x40 /* 64 bytes */
+#define PI_ESIC_K_BURST_HOLDOFF_LEN 0x04 /* 4 bytes */
+#define PI_DEFEA_K_CSR_IO 0x000
#define PI_DEFEA_K_BURST_HOLDOFF 0x040
#define PI_ESIC_K_SLOT_ID 0xC80
@@ -1558,11 +1560,9 @@ typedef union
#define PI_MEM_ADD_MASK_M 0x3ff
-/*
- * Define the fields in the IO Compare registers.
- * The driver must initialize the slot field with the slot ID shifted by the
- * amount shown below.
- */
+/* Define the fields in the I/O Address Compare and Mask registers. */
+
+#define PI_IO_CMP_M_SLOT 0xf0
#define PI_IO_CMP_V_SLOT 4