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authorMintz, Yuval <Yuval.Mintz@cavium.com>2017-06-20 16:00:01 +0300
committerDavid S. Miller <davem@davemloft.net>2017-06-20 19:34:07 +0300
commit26462ad9c7ea18643f1a37adeab8b7eff6c5f5f4 (patch)
tree627b19c7e02a73548c689aa77932799284956f73 /drivers/net/ethernet/qlogic/qed/qed_reg_addr.h
parent1a4a69751f4d24ffd3530f5a9694636db1566a3b (diff)
downloadlinux-26462ad9c7ea18643f1a37adeab8b7eff6c5f5f4.tar.xz
qed: RoCE EDPM to honor PFC
Configure device according to DCBx results so that EDPMs made by RoCE would honor flow-control. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/qlogic/qed/qed_reg_addr.h')
-rw-r--r--drivers/net/ethernet/qlogic/qed/qed_reg_addr.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h b/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h
index 7e4639c9207a..0cdb4337b3a0 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h
+++ b/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h
@@ -1564,6 +1564,12 @@
#define NIG_REG_TSGEN_FREECNT_UPDATE_K2 0x509008UL
#define CNIG_REG_NIG_PORT0_CONF_K2 0x218200UL
+#define NIG_REG_TX_EDPM_CTRL 0x501f0cUL
+#define NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN (0x1 << 0)
+#define NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN_SHIFT 0
+#define NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN (0xff << 1)
+#define NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT 1
+
#define PRS_REG_SEARCH_GFT 0x1f11bcUL
#define PRS_REG_CM_HDR_GFT 0x1f11c8UL
#define PRS_REG_GFT_CAM 0x1f1100UL