diff options
| author | Michael Chan <mchan@broadcom.com> | 2013-01-06 16:51:07 +0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2013-01-07 09:02:07 +0400 |
| commit | c65a17f4f51231f175336048b49b85da7c24fb6c (patch) | |
| tree | 85294ed771456c7dc33175741bae1ef6bb52cea3 /drivers/net/ethernet/broadcom/tg3.h | |
| parent | b7dc8c3959fd43bfa0dbcf65375628c86665cb94 (diff) | |
| download | linux-c65a17f4f51231f175336048b49b85da7c24fb6c.tar.xz | |
tg3: Add support for new 5762 ASIC
Add basic support for 5762 which is a 57765_PLUS class device.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/tg3.h')
| -rw-r--r-- | drivers/net/ethernet/broadcom/tg3.h | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/net/ethernet/broadcom/tg3.h b/drivers/net/ethernet/broadcom/tg3.h index 247d954f3308..46d43f72f8ed 100644 --- a/drivers/net/ethernet/broadcom/tg3.h +++ b/drivers/net/ethernet/broadcom/tg3.h @@ -65,6 +65,9 @@ #define TG3PCI_DEVICE_TIGON3_57766 0x1686 #define TG3PCI_DEVICE_TIGON3_57786 0x16b3 #define TG3PCI_DEVICE_TIGON3_57782 0x16b7 +#define TG3PCI_DEVICE_TIGON3_5762 0x1687 +#define TG3PCI_DEVICE_TIGON3_5725 0x1643 +#define TG3PCI_DEVICE_TIGON3_5727 0x16f3 /* 0x04 --> 0x2c unused */ #define TG3PCI_SUBVENDOR_ID_BROADCOM PCI_VENDOR_ID_BROADCOM #define TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6 0x1644 @@ -159,6 +162,7 @@ #define CHIPREV_ID_57765_A0 0x57785000 #define CHIPREV_ID_5719_A0 0x05719000 #define CHIPREV_ID_5720_A0 0x05720000 +#define CHIPREV_ID_5762_A0 0x05762000 #define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) #define ASIC_REV_5700 0x07 #define ASIC_REV_5701 0x00 @@ -182,6 +186,7 @@ #define ASIC_REV_5719 0x5719 #define ASIC_REV_5720 0x5720 #define ASIC_REV_57766 0x57766 +#define ASIC_REV_5762 0x5762 #define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) #define CHIPREV_5700_AX 0x70 #define CHIPREV_5700_BX 0x71 @@ -1178,6 +1183,7 @@ #define TG3_CPMU_EEE_LNKIDL_CTRL 0x000036bc #define TG3_CPMU_EEE_LNKIDL_PCIE_NL0 0x01000000 #define TG3_CPMU_EEE_LNKIDL_UART_IDL 0x00000004 +#define TG3_CPMU_EEE_LNKIDL_APE_TX_MT 0x00000002 /* 0x36c0 --> 0x36d0 unused */ #define TG3_CPMU_EEE_CTRL 0x000036d0 @@ -1400,7 +1406,10 @@ #define RDMAC_STATUS_FIFOURUN 0x00000080 #define RDMAC_STATUS_FIFOOREAD 0x00000100 #define RDMAC_STATUS_LNGREAD 0x00000200 -/* 0x4808 --> 0x4900 unused */ +/* 0x4808 --> 0x4890 unused */ + +#define TG3_RDMA_RSRVCTRL_REG2 0x00004890 +#define TG3_LSO_RD_DMA_CRPTEN_CTRL2 0x000048a0 #define TG3_RDMA_RSRVCTRL_REG 0x00004900 #define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX 0x00000004 @@ -1910,6 +1919,8 @@ #define FLASH_5717VENDOR_ST_45USPT 0x03400001 #define FLASH_5720_EEPROM_HD 0x00000001 #define FLASH_5720_EEPROM_LD 0x00000003 +#define FLASH_5762_EEPROM_HD 0x02000001 +#define FLASH_5762_EEPROM_LD 0x02000003 #define FLASH_5720VENDOR_M_ATMEL_DB011D 0x01000000 #define FLASH_5720VENDOR_M_ATMEL_DB021D 0x01000002 #define FLASH_5720VENDOR_M_ATMEL_DB041D 0x01000001 @@ -3206,6 +3217,7 @@ struct tg3 { #define TG3_PHY_ID_BCM57765 0x5c0d8a40 #define TG3_PHY_ID_BCM5719C 0x5c0d8a20 #define TG3_PHY_ID_BCM5720C 0x5c0d8b60 +#define TG3_PHY_ID_BCM5762 0x85803780 #define TG3_PHY_ID_BCM5906 0xdc00ac40 #define TG3_PHY_ID_BCM8002 0x60010140 #define TG3_PHY_ID_INVALID 0xffffffff @@ -3230,6 +3242,7 @@ struct tg3 { (X) == TG3_PHY_ID_BCM5906 || (X) == TG3_PHY_ID_BCM5761 || \ (X) == TG3_PHY_ID_BCM5718C || (X) == TG3_PHY_ID_BCM5718S || \ (X) == TG3_PHY_ID_BCM57765 || (X) == TG3_PHY_ID_BCM5719C || \ + (X) == TG3_PHY_ID_BCM5720C || (X) == TG3_PHY_ID_BCM5762 || \ (X) == TG3_PHY_ID_BCM8002) u32 phy_flags; |