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authorTejun Heo <tj@kernel.org>2011-01-25 16:26:50 +0300
committerTejun Heo <tj@kernel.org>2011-01-25 16:26:50 +0300
commit19df0c2fef010e94e90df514aaf4e73f6b80145c (patch)
tree4b0b9c10622aead0d8b658cca6c49090149a91a8 /drivers/net/davinci_cpdma.h
parentc723fdab8aa728dc2bf0da6a0de8bb9c3f588d84 (diff)
downloadlinux-19df0c2fef010e94e90df514aaf4e73f6b80145c.tar.xz
percpu: align percpu readmostly subsection to cacheline
Currently percpu readmostly subsection may share cachelines with other percpu subsections which may result in unnecessary cacheline bounce and performance degradation. This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR() linker macros, makes each arch linker scripts specify its cacheline size and use it to align percpu subsections. This is based on Shaohua's x86 only patch. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Shaohua Li <shaohua.li@intel.com>
Diffstat (limited to 'drivers/net/davinci_cpdma.h')
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