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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-01-23 18:49:15 +0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-01-26 00:17:03 +0400
commit768cf7f44074d5e1029daf90740b77ea3cb87642 (patch)
treeb173383989c4a93b4c1a28ba74295b77745dde3c /drivers/md/dm-cache-policy.h
parentfe74c1a54f6781beab830f5bf373fc24f273d088 (diff)
downloadlinux-768cf7f44074d5e1029daf90740b77ea3cb87642.tar.xz
drm/i915: Kill most of the FBC register save/restore
We will anyway re-enable FBC normally after resume, so trying to save and restore the register makes little sense. We do need to preserve the FBC1 interval bits in FBC_CONTROL since we only initialize them during driver load, and try to preserve them after that. v2: s/I915_HAS_FBC/HAS_FBC/ and fix the check for gen4 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/md/dm-cache-policy.h')
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