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| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2021-01-18 07:11:53 +0300 |
|---|---|---|
| committer | Jassi Brar <jaswinder.singh@linaro.org> | 2021-02-15 08:25:35 +0300 |
| commit | c319f78cba83bb0475cbcbf221492c651bd35b2b (patch) | |
| tree | 222e7483dff81f6199543618be94c56e682aee02 /drivers/mailbox/arm_mhuv2.c | |
| parent | 0d17014e91898b20fb5010a03470f11fee3c6391 (diff) | |
| download | linux-c319f78cba83bb0475cbcbf221492c651bd35b2b.tar.xz | |
mailbox: qcom: Add support for SDX55 APCS IPC
In SDX55, the IPC bits are located in the APCS GCC block. Also, this block
can provide clock functionality. Hence, add support for IPC with correct
offset and name of the clock provider.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Diffstat (limited to 'drivers/mailbox/arm_mhuv2.c')
0 files changed, 0 insertions, 0 deletions