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authorMustafa Ismail <mustafa.ismail@intel.com>2022-07-06 02:08:09 +0300
committerLeon Romanovsky <leonro@nvidia.com>2022-07-18 10:39:28 +0300
commit137d264c6f63f5b57200b8becb00d7cc58163c05 (patch)
tree1d6a2413d77d7f84d1f2b381ae5d04daa2916be8 /drivers/infiniband/hw/irdma/main.h
parent2157f5caaed59128d70a1dd72f5ec809cad54407 (diff)
downloadlinux-137d264c6f63f5b57200b8becb00d7cc58163c05.tar.xz
RDMA/irdma: Add 2 level PBLE support for FMR
Level 2 Physical Buffer List Entry (PBLE) is currently not supported for Fast MRs which limits memory registrations to 256K pages. Adapt irdma_set_page and irdma_alloc_mr to allow for 2 level PBLEs. Link: https://lore.kernel.org/r/20220705230815.265-2-shiraz.saleem@intel.com Signed-off-by: Mustafa Ismail <mustafa.ismail@intel.com> Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com> Signed-off-by: Leon Romanovsky <leon@kernel.org>
Diffstat (limited to 'drivers/infiniband/hw/irdma/main.h')
-rw-r--r--drivers/infiniband/hw/irdma/main.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/irdma/main.h b/drivers/infiniband/hw/irdma/main.h
index ef862bced20f..65e966ad3453 100644
--- a/drivers/infiniband/hw/irdma/main.h
+++ b/drivers/infiniband/hw/irdma/main.h
@@ -85,7 +85,7 @@ extern struct auxiliary_driver i40iw_auxiliary_drv;
#define IRDMA_NO_QSET 0xffff
#define IW_CFG_FPM_QP_COUNT 32768
-#define IRDMA_MAX_PAGES_PER_FMR 512
+#define IRDMA_MAX_PAGES_PER_FMR 262144
#define IRDMA_MIN_PAGES_PER_FMR 1
#define IRDMA_CQP_COMPL_RQ_WQE_FLUSHED 2
#define IRDMA_CQP_COMPL_SQ_WQE_FLUSHED 3