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| author | Shiraz Saleem <shiraz.saleem@intel.com> | 2017-12-22 18:46:59 +0300 |
|---|---|---|
| committer | Jason Gunthorpe <jgg@mellanox.com> | 2017-12-22 23:39:20 +0300 |
| commit | df8b13a1b23356d01dfc4647a5629cdb0f4ce566 (patch) | |
| tree | a5a2daf56535260f61832959f124cbd5999c5eb2 /drivers/infiniband/hw/i40iw/i40iw_d.h | |
| parent | 3020f252c3aa7bd59c5df38671f1ef13a0426e40 (diff) | |
| download | linux-df8b13a1b23356d01dfc4647a5629cdb0f4ce566.tar.xz | |
i40iw: Fix sequence number for the first partial FPDU
Partial FPDU processing is broken as the sequence number
for the first partial FPDU is wrong due to incorrect
Q2 buffer offset. The offset should be 64 rather than 16.
Fixes: 786c6adb3a94 ("i40iw: add puda code")
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Diffstat (limited to 'drivers/infiniband/hw/i40iw/i40iw_d.h')
| -rw-r--r-- | drivers/infiniband/hw/i40iw/i40iw_d.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/infiniband/hw/i40iw/i40iw_d.h b/drivers/infiniband/hw/i40iw/i40iw_d.h index 65ec39e3746b..b8565872d744 100644 --- a/drivers/infiniband/hw/i40iw/i40iw_d.h +++ b/drivers/infiniband/hw/i40iw/i40iw_d.h @@ -97,6 +97,7 @@ #define RDMA_OPCODE_MASK 0x0f #define RDMA_READ_REQ_OPCODE 1 #define Q2_BAD_FRAME_OFFSET 72 +#define Q2_FPSN_OFFSET 64 #define CQE_MAJOR_DRV 0x8000 #define I40IW_TERM_SENT 0x01 |