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authorDave Airlie <airlied@redhat.com>2026-06-09 08:00:01 +0300
committerDave Airlie <airlied@redhat.com>2026-06-09 08:00:10 +0300
commitf5ed9dba3100e607a9724f38a7e202107a13dfd3 (patch)
tree2aa92a276c6876e1a1087dbb1162c2f606168520 /drivers/gpu
parent5ea194bc25518376dee1209e64d32f940dd0cc4c (diff)
parent62c1671f6454ceaa80e9ceff63f821aa36f35154 (diff)
downloadlinux-f5ed9dba3100e607a9724f38a7e202107a13dfd3.tar.xz
Merge tag 'drm-misc-next-fixes-2026-06-05' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
drm-misc-next-fixes for v7.2-rc1: - Revert last minute IS_ERR_OR_NULL changes in nouveau/gsp. - Fix build warning in drm scheduler. - Flush caches and TLB before v3d runtime suspend. - Fix a trace and debug command in amdxdna. - Fix heap buffer address validation when PASID is disabled in amdxdna. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patch.msgid.link/a4a5bf50-3fc8-4faf-884b-08121687124a@linux.intel.com
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h8
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/alloc.c4
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/bar.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/ctrl.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rpc.c10
-rw-r--r--drivers/gpu/drm/scheduler/tests/tests_scheduler.c12
-rw-r--r--drivers/gpu/drm/v3d/v3d_mmu.c31
-rw-r--r--drivers/gpu/drm/v3d/v3d_power.c2
8 files changed, 39 insertions, 32 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
index d771134fa410..64fed208e4cf 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
@@ -293,7 +293,7 @@ nvkm_gsp_rpc_rd(struct nvkm_gsp *gsp, u32 fn, u32 argc)
{
void *argv = nvkm_gsp_rpc_get(gsp, fn, argc);
- if (IS_ERR(argv))
+ if (IS_ERR_OR_NULL(argv))
return argv;
return nvkm_gsp_rpc_push(gsp, argv, NVKM_GSP_RPC_REPLY_RECV, argc);
@@ -373,7 +373,7 @@ nvkm_gsp_rm_alloc_get(struct nvkm_gsp_object *parent, u32 handle, u32 oclass, u3
object->handle = handle;
argv = gsp->rm->api->alloc->get(object, oclass, argc);
- if (IS_ERR(argv)) {
+ if (IS_ERR_OR_NULL(argv)) {
object->client = NULL;
return argv;
}
@@ -415,8 +415,8 @@ nvkm_gsp_rm_alloc(struct nvkm_gsp_object *parent, u32 handle, u32 oclass, u32 ar
{
void *argv = nvkm_gsp_rm_alloc_get(parent, handle, oclass, argc, object);
- if (IS_ERR(argv))
- return PTR_ERR(argv);
+ if (IS_ERR_OR_NULL(argv))
+ return argv ? PTR_ERR(argv) : -EIO;
return nvkm_gsp_rm_alloc_wr(object, argv);
}
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/alloc.c b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/alloc.c
index 27f275d2e151..46e3a29f2ad7 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/alloc.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/alloc.c
@@ -35,7 +35,7 @@ r535_gsp_rpc_rm_free(struct nvkm_gsp_object *object)
client->object.handle, object->handle);
rpc = nvkm_gsp_rpc_get(gsp, NV_VGPU_MSG_FUNCTION_FREE, sizeof(*rpc));
- if (WARN_ON(IS_ERR(rpc)))
+ if (WARN_ON(IS_ERR_OR_NULL(rpc)))
return -EIO;
rpc->params.hRoot = client->object.handle;
@@ -60,7 +60,7 @@ r535_gsp_rpc_rm_alloc_push(struct nvkm_gsp_object *object, void *params)
void *ret = NULL;
rpc = nvkm_gsp_rpc_push(gsp, rpc, NVKM_GSP_RPC_REPLY_RECV, sizeof(*rpc));
- if (IS_ERR(rpc))
+ if (IS_ERR_OR_NULL(rpc))
return rpc;
if (rpc->status) {
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/bar.c b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/bar.c
index 9cd68f8622d3..fae08ac3b18c 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/bar.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/bar.c
@@ -55,7 +55,7 @@ r535_bar_bar2_update_pde(struct nvkm_gsp *gsp, u8 page_shift, u64 pdbe)
rpc_update_bar_pde_v15_00 *rpc;
rpc = nvkm_gsp_rpc_get(gsp, NV_VGPU_MSG_FUNCTION_UPDATE_BAR_PDE, sizeof(*rpc));
- if (WARN_ON(IS_ERR(rpc)))
+ if (WARN_ON(IS_ERR_OR_NULL(rpc)))
return -EIO;
rpc->info.barType = NV_RPC_UPDATE_PDE_BAR_2;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/ctrl.c b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/ctrl.c
index aa0ebd3dfb17..70b9ee911c5e 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/ctrl.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/ctrl.c
@@ -42,7 +42,7 @@ r535_gsp_rpc_rm_ctrl_push(struct nvkm_gsp_object *object, void **params, u32 rep
int ret = 0;
rpc = nvkm_gsp_rpc_push(gsp, rpc, NVKM_GSP_RPC_REPLY_RECV, repc);
- if (IS_ERR(rpc)) {
+ if (IS_ERR_OR_NULL(rpc)) {
*params = NULL;
return PTR_ERR(rpc);
}
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rpc.c b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rpc.c
index 0c9657cb2dd7..3ca3de8f4340 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rpc.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rpc.c
@@ -324,7 +324,7 @@ r535_gsp_msgq_recv(struct nvkm_gsp *gsp, u32 gsp_rpc_len, int *retries)
u32 size;
rpc = r535_gsp_msgq_peek(gsp, sizeof(*rpc), info.retries);
- if (IS_ERR(rpc)) {
+ if (IS_ERR_OR_NULL(rpc)) {
kvfree(buf);
return rpc;
}
@@ -333,7 +333,7 @@ r535_gsp_msgq_recv(struct nvkm_gsp *gsp, u32 gsp_rpc_len, int *retries)
info.continuation = true;
rpc = r535_gsp_msgq_recv_one_elem(gsp, &info);
- if (IS_ERR(rpc)) {
+ if (IS_ERR_OR_NULL(rpc)) {
kvfree(buf);
return rpc;
}
@@ -459,11 +459,11 @@ r535_gsp_msg_recv(struct nvkm_gsp *gsp, int fn, u32 gsp_rpc_len)
retry:
rpc = r535_gsp_msgq_peek(gsp, sizeof(*rpc), &retries);
- if (IS_ERR(rpc))
+ if (IS_ERR_OR_NULL(rpc))
return rpc;
rpc = r535_gsp_msgq_recv(gsp, gsp_rpc_len, &retries);
- if (IS_ERR(rpc))
+ if (IS_ERR_OR_NULL(rpc))
return rpc;
if (rpc->rpc_result) {
@@ -561,7 +561,7 @@ r535_gsp_rpc_handle_reply(struct nvkm_gsp *gsp, u32 fn,
break;
case NVKM_GSP_RPC_REPLY_RECV:
reply = r535_gsp_msg_recv(gsp, fn, gsp_rpc_len);
- if (!IS_ERR(reply))
+ if (!IS_ERR_OR_NULL(reply))
repv = reply->data;
else
repv = reply;
diff --git a/drivers/gpu/drm/scheduler/tests/tests_scheduler.c b/drivers/gpu/drm/scheduler/tests/tests_scheduler.c
index 8b2e4ef9915f..90d31888cf92 100644
--- a/drivers/gpu/drm/scheduler/tests/tests_scheduler.c
+++ b/drivers/gpu/drm/scheduler/tests/tests_scheduler.c
@@ -666,14 +666,10 @@ static void drm_sched_scheduler_two_clients_test(struct kunit *test)
}
}
-static const struct kunit_attributes drm_sched_scheduler_two_clients_attr = {
- .speed = KUNIT_SPEED_SLOW,
-};
-
static struct kunit_case drm_sched_scheduler_two_clients_tests[] = {
KUNIT_CASE_PARAM_ATTR(drm_sched_scheduler_two_clients_test,
drm_sched_scheduler_two_clients_gen_params,
- drm_sched_scheduler_two_clients_attr),
+ { .speed = KUNIT_SPEED_SLOW }),
{}
};
@@ -858,14 +854,10 @@ static void drm_sched_scheduler_many_clients_test(struct kunit *test)
drm_mock_sched_entity_free(client[i].entity);
}
-static const struct kunit_attributes drm_sched_scheduler_many_clients_attr = {
- .speed = KUNIT_SPEED_SLOW,
-};
-
static struct kunit_case drm_sched_scheduler_many_clients_tests[] = {
KUNIT_CASE_PARAM_ATTR(drm_sched_scheduler_many_clients_test,
drm_sched_scheduler_many_clients_gen_params,
- drm_sched_scheduler_many_clients_attr),
+ { .speed = KUNIT_SPEED_SLOW }),
{}
};
diff --git a/drivers/gpu/drm/v3d/v3d_mmu.c b/drivers/gpu/drm/v3d/v3d_mmu.c
index 630c64e51d2f..94f6676d5633 100644
--- a/drivers/gpu/drm/v3d/v3d_mmu.c
+++ b/drivers/gpu/drm/v3d/v3d_mmu.c
@@ -37,13 +37,14 @@ static bool v3d_mmu_is_aligned(u32 page, u32 page_address, size_t alignment)
IS_ALIGNED(page_address, alignment >> V3D_MMU_PAGE_SHIFT);
}
-int v3d_mmu_flush_all(struct v3d_dev *v3d)
+/*
+ * Issue the MMUC flush and TLB clear unconditionally. The caller must
+ * already know that V3D is reachable. In particular, this is used from
+ * the runtime resume callback.
+ */
+static int v3d_mmu_flush_all_locked(struct v3d_dev *v3d)
{
- int ret = 0;
-
- /* Flush the PTs only if we're already awake */
- if (!pm_runtime_get_if_active(v3d->drm.dev))
- return 0;
+ int ret;
V3D_WRITE(V3D_MMUC_CONTROL, V3D_MMUC_CONTROL_FLUSH |
V3D_MMUC_CONTROL_ENABLE);
@@ -52,7 +53,7 @@ int v3d_mmu_flush_all(struct v3d_dev *v3d)
V3D_MMUC_CONTROL_FLUSHING), 100);
if (ret) {
dev_err(v3d->drm.dev, "MMUC flush wait idle failed\n");
- goto pm_put;
+ return ret;
}
V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL) |
@@ -63,7 +64,19 @@ int v3d_mmu_flush_all(struct v3d_dev *v3d)
if (ret)
dev_err(v3d->drm.dev, "MMU TLB clear wait idle failed\n");
-pm_put:
+ return ret;
+}
+
+int v3d_mmu_flush_all(struct v3d_dev *v3d)
+{
+ int ret;
+
+ /* Flush the PTs only if we're already awake */
+ if (!pm_runtime_get_if_active(v3d->drm.dev))
+ return 0;
+
+ ret = v3d_mmu_flush_all_locked(v3d);
+
v3d_pm_runtime_put(v3d);
return ret;
}
@@ -85,7 +98,7 @@ int v3d_mmu_set_page_table(struct v3d_dev *v3d)
V3D_MMU_ILLEGAL_ADDR_ENABLE);
V3D_WRITE(V3D_MMUC_CONTROL, V3D_MMUC_CONTROL_ENABLE);
- return v3d_mmu_flush_all(v3d);
+ return v3d_mmu_flush_all_locked(v3d);
}
void v3d_mmu_insert_ptes(struct v3d_bo *bo)
diff --git a/drivers/gpu/drm/v3d/v3d_power.c b/drivers/gpu/drm/v3d/v3d_power.c
index 769e90032b04..f7df6393d38f 100644
--- a/drivers/gpu/drm/v3d/v3d_power.c
+++ b/drivers/gpu/drm/v3d/v3d_power.c
@@ -52,6 +52,8 @@ int v3d_power_suspend(struct device *dev)
v3d_irq_disable(v3d);
+ v3d_clean_caches(v3d);
+
ret = v3d_suspend_sms(v3d);
if (ret) {
v3d_irq_enable(v3d);