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authorVille Syrjälä <ville.syrjala@linux.intel.com>2018-11-07 21:41:38 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2018-11-09 20:10:37 +0300
commit7b012bd62db951384a73943311822d1fb447e416 (patch)
tree4f81f035643a32cfffdb2a699722bcb52b61c0ad /drivers/gpu
parent89d67d172dead981fa8888eb7c5f37ada21687c3 (diff)
downloadlinux-7b012bd62db951384a73943311822d1fb447e416.tar.xz
drm/i915: Polish the skl+ plane keyval/msk/max register setup
Due to the constant alpha we're going to have to program two of the the tree keying registers anyway, so might as well always program all three. And parametrize the plane constant alpha define while at it. v2: Rebase due to input CSC Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181107184138.31359-1-ville.syrjala@linux.intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c22
2 files changed, 10 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 158cf4716d03..fe4b913e46ac 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6559,7 +6559,7 @@ enum {
#define PLANE_KEYMSK_ALPHA_ENABLE (1 << 31)
#define _PLANE_KEYMAX_1_A 0x701a0
#define _PLANE_KEYMAX_2_A 0x702a0
-#define PLANE_KEYMAX_ALPHA_SHIFT 24
+#define PLANE_KEYMAX_ALPHA(a) ((a) << 24)
#define _PLANE_AUX_DIST_1_A 0x701c0
#define _PLANE_AUX_DIST_2_A 0x702c0
#define _PLANE_AUX_OFFSET_1_A 0x701c4
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 287a43524564..6d9f321cdf7b 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -478,13 +478,20 @@ skl_program_plane(struct intel_plane *plane,
uint32_t src_h = drm_rect_height(&plane_state->base.src) >> 16;
struct intel_plane *linked = plane_state->linked_plane;
const struct drm_framebuffer *fb = plane_state->base.fb;
+ u8 alpha = plane_state->base.alpha >> 8;
unsigned long irqflags;
- u32 keymsk = 0, keymax = 0;
+ u32 keymsk, keymax;
/* Sizes are 0 based */
src_w--;
src_h--;
+ keymax = (key->max_value & 0xffffff) | PLANE_KEYMAX_ALPHA(alpha);
+
+ keymsk = key->channel_mask & 0x3ffffff;
+ if (alpha < 0xff)
+ keymsk |= PLANE_KEYMSK_ALPHA_ENABLE;
+
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
@@ -494,18 +501,7 @@ skl_program_plane(struct intel_plane *plane,
if (fb->format->is_yuv && icl_is_hdr_plane(plane))
icl_program_input_csc_coeff(crtc_state, plane_state);
- if (key->flags) {
- I915_WRITE_FW(PLANE_KEYVAL(pipe, plane_id), key->min_value);
-
- keymax |= key->max_value & 0xffffff;
- keymsk |= key->channel_mask & 0x3ffffff;
- }
-
- keymax |= (plane_state->base.alpha >> 8) << PLANE_KEYMAX_ALPHA_SHIFT;
-
- if (plane_state->base.alpha < 0xff00)
- keymsk |= PLANE_KEYMSK_ALPHA_ENABLE;
-
+ I915_WRITE_FW(PLANE_KEYVAL(pipe, plane_id), key->min_value);
I915_WRITE_FW(PLANE_KEYMAX(pipe, plane_id), keymax);
I915_WRITE_FW(PLANE_KEYMSK(pipe, plane_id), keymsk);