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| author | Steve Longerbeam <slongerbeam@gmail.com> | 2014-06-26 05:05:54 +0400 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2014-09-02 16:55:55 +0400 |
| commit | 60c04456f68f67f68180ebd84a47e4c58931f70f (patch) | |
| tree | 51fb8c5a0d9bbc1544d6af4d2d2a496928bab119 /drivers/gpu | |
| parent | 9a34cef01392358421b764645073601c352d0a85 (diff) | |
| download | linux-60c04456f68f67f68180ebd84a47e4c58931f70f.tar.xz | |
gpu: ipu-cpmem: Add ipu_cpmem_dump()
Adds ipu_cpmem_dump() which dumps a channel's cpmem to debug.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/ipu-v3/ipu-cpmem.c | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index c55f3620e84a..3bf05bc4ab67 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c @@ -674,6 +674,69 @@ int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image) } EXPORT_SYMBOL_GPL(ipu_cpmem_set_image); +void ipu_cpmem_dump(struct ipuv3_channel *ch) +{ + struct ipu_ch_param __iomem *p = ipu_get_cpmem(ch); + struct ipu_soc *ipu = ch->ipu; + int chno = ch->num; + + dev_dbg(ipu->dev, "ch %d word 0 - %08X %08X %08X %08X %08X\n", chno, + readl(&p->word[0].data[0]), + readl(&p->word[0].data[1]), + readl(&p->word[0].data[2]), + readl(&p->word[0].data[3]), + readl(&p->word[0].data[4])); + dev_dbg(ipu->dev, "ch %d word 1 - %08X %08X %08X %08X %08X\n", chno, + readl(&p->word[1].data[0]), + readl(&p->word[1].data[1]), + readl(&p->word[1].data[2]), + readl(&p->word[1].data[3]), + readl(&p->word[1].data[4])); + dev_dbg(ipu->dev, "PFS 0x%x, ", + ipu_ch_param_read_field(ch, IPU_FIELD_PFS)); + dev_dbg(ipu->dev, "BPP 0x%x, ", + ipu_ch_param_read_field(ch, IPU_FIELD_BPP)); + dev_dbg(ipu->dev, "NPB 0x%x\n", + ipu_ch_param_read_field(ch, IPU_FIELD_NPB)); + + dev_dbg(ipu->dev, "FW %d, ", + ipu_ch_param_read_field(ch, IPU_FIELD_FW)); + dev_dbg(ipu->dev, "FH %d, ", + ipu_ch_param_read_field(ch, IPU_FIELD_FH)); + dev_dbg(ipu->dev, "EBA0 0x%x\n", + ipu_ch_param_read_field(ch, IPU_FIELD_EBA0) << 3); + dev_dbg(ipu->dev, "EBA1 0x%x\n", + ipu_ch_param_read_field(ch, IPU_FIELD_EBA1) << 3); + dev_dbg(ipu->dev, "Stride %d\n", + ipu_ch_param_read_field(ch, IPU_FIELD_SL)); + dev_dbg(ipu->dev, "scan_order %d\n", + ipu_ch_param_read_field(ch, IPU_FIELD_SO)); + dev_dbg(ipu->dev, "uv_stride %d\n", + ipu_ch_param_read_field(ch, IPU_FIELD_SLUV)); + dev_dbg(ipu->dev, "u_offset 0x%x\n", + ipu_ch_param_read_field(ch, IPU_FIELD_UBO) << 3); + dev_dbg(ipu->dev, "v_offset 0x%x\n", + ipu_ch_param_read_field(ch, IPU_FIELD_VBO) << 3); + + dev_dbg(ipu->dev, "Width0 %d+1, ", + ipu_ch_param_read_field(ch, IPU_FIELD_WID0)); + dev_dbg(ipu->dev, "Width1 %d+1, ", + ipu_ch_param_read_field(ch, IPU_FIELD_WID1)); + dev_dbg(ipu->dev, "Width2 %d+1, ", + ipu_ch_param_read_field(ch, IPU_FIELD_WID2)); + dev_dbg(ipu->dev, "Width3 %d+1, ", + ipu_ch_param_read_field(ch, IPU_FIELD_WID3)); + dev_dbg(ipu->dev, "Offset0 %d, ", + ipu_ch_param_read_field(ch, IPU_FIELD_OFS0)); + dev_dbg(ipu->dev, "Offset1 %d, ", + ipu_ch_param_read_field(ch, IPU_FIELD_OFS1)); + dev_dbg(ipu->dev, "Offset2 %d, ", + ipu_ch_param_read_field(ch, IPU_FIELD_OFS2)); + dev_dbg(ipu->dev, "Offset3 %d\n", + ipu_ch_param_read_field(ch, IPU_FIELD_OFS3)); +} +EXPORT_SYMBOL_GPL(ipu_cpmem_dump); + int ipu_cpmem_init(struct ipu_soc *ipu, struct device *dev, unsigned long base) { struct ipu_cpmem *cpmem; |