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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-08-20 20:42:41 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-08-20 20:42:41 +0300
commit5c40cd7db64a2949f268d7467b9be551a565d14b (patch)
treefb8a67f6edcb0c9922c256a598d675c1c04051d6 /drivers/gpu/drm/xe/xe_memirq.c
parent8bde384a2090759efc9b92f34300887d418a2a3a (diff)
parent25bf10be219d37d2fb221c93816a913f5f735530 (diff)
downloadlinux-rolling-stable.tar.xz
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_memirq.c')
-rw-r--r--drivers/gpu/drm/xe/xe_memirq.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xe/xe_memirq.c b/drivers/gpu/drm/xe/xe_memirq.c
index 404fa2a456d5..49c45ec3e83c 100644
--- a/drivers/gpu/drm/xe/xe_memirq.c
+++ b/drivers/gpu/drm/xe/xe_memirq.c
@@ -86,7 +86,7 @@ static const char *guc_name(struct xe_guc *guc)
* This object needs to be 4KiB aligned.
*
* - _`Interrupt Source Report Page`: this is the equivalent of the
- * GEN11_GT_INTR_DWx registers, with each bit in those registers being
+ * GT_INTR_DWx registers, with each bit in those registers being
* mapped to a byte here. The offsets are the same, just bytes instead
* of bits. This object needs to be cacheline aligned.
*