diff options
| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2018-11-24 20:57:17 +0300 |
|---|---|---|
| committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2019-01-14 04:51:24 +0300 |
| commit | cef0d9cfe4e5b6c756c268c1b7dda7fa257336fc (patch) | |
| tree | 8fba970806f0399ff260ea3d1b39631de8c07f95 /drivers/gpu/drm/rcar-du/rcar_du_drv.h | |
| parent | f41cb153e6faf0d1f4bbe0b0f15aa20de1e43e90 (diff) | |
| download | linux-cef0d9cfe4e5b6c756c268c1b7dda7fa257336fc.tar.xz | |
drm: rcar-du: Replace EXT_CTRL_REGS feature flag with generation check
The RCAR_DU_FEATURE_EXT_CTRL_REGS feature flag is missing for H1 only,
which is a first generation device, not a second generation device as
reported in the device information table. Fix the H1 generation and use
generation checks to replace the feature flag.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Diffstat (limited to 'drivers/gpu/drm/rcar-du/rcar_du_drv.h')
| -rw-r--r-- | drivers/gpu/drm/rcar-du/rcar_du_drv.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h index a68da79b424e..2ba311734f30 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h @@ -23,10 +23,9 @@ struct drm_device; struct rcar_du_device; #define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK BIT(0) /* Per-CRTC IRQ and clock */ -#define RCAR_DU_FEATURE_EXT_CTRL_REGS BIT(1) /* Has extended control registers */ -#define RCAR_DU_FEATURE_VSP1_SOURCE BIT(2) /* Has inputs from VSP1 */ -#define RCAR_DU_FEATURE_INTERLACED BIT(3) /* HW supports interlaced */ -#define RCAR_DU_FEATURE_TVM_SYNC BIT(4) /* Has TV switch/sync modes */ +#define RCAR_DU_FEATURE_VSP1_SOURCE BIT(1) /* Has inputs from VSP1 */ +#define RCAR_DU_FEATURE_INTERLACED BIT(2) /* HW supports interlaced */ +#define RCAR_DU_FEATURE_TVM_SYNC BIT(3) /* Has TV switch/sync modes */ #define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */ |