diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2013-12-18 23:07:14 +0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2013-12-25 02:57:06 +0400 |
commit | 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 (patch) | |
tree | 2b6002db2816965b8d2850728b81ff0099b036a9 /drivers/gpu/drm/radeon/cik.c | |
parent | e14cd2bbcb98541e199b7223f38d61527dfe45c9 (diff) | |
download | linux-6c7bccea390853bdec5b76fe31fc50f3b36f75d5.tar.xz |
drm/radeon/pm: move pm handling into the asic specific code
We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.
This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/cik.c')
-rw-r--r-- | drivers/gpu/drm/radeon/cik.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index 4ddc3e5c2d97..25a6ef6c7e4c 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -1697,7 +1697,7 @@ static void cik_srbm_select(struct radeon_device *rdev, * Load the GDDR MC ucode into the hw (CIK). * Returns 0 on success, error on failure. */ -static int ci_mc_load_microcode(struct radeon_device *rdev) +int ci_mc_load_microcode(struct radeon_device *rdev) { const __be32 *fw_data; u32 running, blackout = 0; @@ -7501,7 +7501,7 @@ static int cik_startup(struct radeon_device *rdev) cik_mc_program(rdev); - if (!(rdev->flags & RADEON_IS_IGP)) { + if (!(rdev->flags & RADEON_IS_IGP) && !rdev->pm.dpm_enabled) { r = ci_mc_load_microcode(rdev); if (r) { DRM_ERROR("Failed to load MC firmware!\n"); @@ -7710,6 +7710,8 @@ int cik_resume(struct radeon_device *rdev) /* init golden registers */ cik_init_golden_registers(rdev); + radeon_pm_resume(rdev); + rdev->accel_working = true; r = cik_startup(rdev); if (r) { @@ -7733,6 +7735,7 @@ int cik_resume(struct radeon_device *rdev) */ int cik_suspend(struct radeon_device *rdev) { + radeon_pm_suspend(rdev); dce6_audio_fini(rdev); radeon_vm_manager_fini(rdev); cik_cp_enable(rdev, false); @@ -7835,6 +7838,9 @@ int cik_init(struct radeon_device *rdev) } } + /* Initialize power management */ + radeon_pm_init(rdev); + ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; ring->ring_obj = NULL; r600_ring_init(rdev, ring, 1024 * 1024); @@ -7915,6 +7921,7 @@ int cik_init(struct radeon_device *rdev) */ void cik_fini(struct radeon_device *rdev) { + radeon_pm_fini(rdev); cik_cp_fini(rdev); cik_sdma_fini(rdev); cik_fini_pg(rdev); |