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authorTomi Valkeinen <tomi.valkeinen@ti.com>2015-11-05 19:39:52 +0300
committerTomi Valkeinen <tomi.valkeinen@ti.com>2017-04-03 12:36:40 +0300
commit9f759225e42b00ad0c5a55907f443b388e8960f4 (patch)
treead3c4b7b29003cdc70002fb3b8c9dcd41b33f93e /drivers/gpu/drm/omapdrm
parenta1a37647d240ffb0b6480c2ecd1b02a4c21f6926 (diff)
downloadlinux-9f759225e42b00ad0c5a55907f443b388e8960f4.tar.xz
drm/omap: use dispc_ops
Change omapdrm to get dispc_ops and use that to call the dispc functions instead or direct function calls. The change is very straightforward. The only problem was in omap_crtc_init() which calls pipe2vbl(crtc), and at that point of time the crtc->dev link, which is used to get the dispc_ops, has not been set up yet. This patch makes omap_crtc_init() skip the call to pipe2vbl() and instead calls dispc_ops->mgr_get_vsync_irq() directly. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm')
-rw-r--r--drivers/gpu/drm/omapdrm/omap_crtc.c36
-rw-r--r--drivers/gpu/drm/omapdrm/omap_drv.c10
-rw-r--r--drivers/gpu/drm/omapdrm/omap_drv.h2
-rw-r--r--drivers/gpu/drm/omapdrm/omap_irq.c33
-rw-r--r--drivers/gpu/drm/omapdrm/omap_plane.c15
5 files changed, 57 insertions, 39 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c
index 49fc61963af4..1db96b077ae8 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -107,10 +107,12 @@ static struct omap_dss_device *omap_crtc_output[8];
static int omap_crtc_dss_connect(enum omap_channel channel,
struct omap_dss_device *dst)
{
+ const struct dispc_ops *dispc_ops = dispc_get_ops();
+
if (omap_crtc_output[channel])
return -EINVAL;
- if ((dispc_mgr_get_supported_outputs(channel) & dst->id) == 0)
+ if ((dispc_ops->mgr_get_supported_outputs(channel) & dst->id) == 0)
return -EINVAL;
omap_crtc_output[channel] = dst;
@@ -134,6 +136,7 @@ static void omap_crtc_dss_start_update(enum omap_channel channel)
static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
{
struct drm_device *dev = crtc->dev;
+ struct omap_drm_private *priv = dev->dev_private;
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
enum omap_channel channel = omap_crtc->channel;
struct omap_irq_wait *wait;
@@ -144,7 +147,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
return;
if (omap_crtc_output[channel]->output_type == OMAP_DISPLAY_TYPE_HDMI) {
- dispc_mgr_enable(channel, enable);
+ priv->dispc_ops->mgr_enable(channel, enable);
omap_crtc->enabled = enable;
return;
}
@@ -157,8 +160,8 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
omap_crtc->ignore_digit_sync_lost = true;
}
- framedone_irq = dispc_mgr_get_framedone_irq(channel);
- vsync_irq = dispc_mgr_get_vsync_irq(channel);
+ framedone_irq = priv->dispc_ops->mgr_get_framedone_irq(channel);
+ vsync_irq = priv->dispc_ops->mgr_get_vsync_irq(channel);
if (enable) {
wait = omap_irq_wait_init(dev, vsync_irq, 1);
@@ -178,7 +181,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
wait = omap_irq_wait_init(dev, vsync_irq, 2);
}
- dispc_mgr_enable(channel, enable);
+ priv->dispc_ops->mgr_enable(channel, enable);
omap_crtc->enabled = enable;
ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
@@ -198,9 +201,9 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
static int omap_crtc_dss_enable(enum omap_channel channel)
{
struct omap_crtc *omap_crtc = omap_crtcs[channel];
+ struct omap_drm_private *priv = omap_crtc->base.dev->dev_private;
- dispc_mgr_set_timings(omap_crtc->channel,
- &omap_crtc->vm);
+ priv->dispc_ops->mgr_set_timings(omap_crtc->channel, &omap_crtc->vm);
omap_crtc_set_enabled(&omap_crtc->base, true);
return 0;
@@ -225,8 +228,10 @@ static void omap_crtc_dss_set_lcd_config(enum omap_channel channel,
const struct dss_lcd_mgr_config *config)
{
struct omap_crtc *omap_crtc = omap_crtcs[channel];
+ struct omap_drm_private *priv = omap_crtc->base.dev->dev_private;
+
DBG("%s", omap_crtc->name);
- dispc_mgr_set_lcd_config(omap_crtc->channel, config);
+ priv->dispc_ops->mgr_set_lcd_config(omap_crtc->channel, config);
}
static int omap_crtc_dss_register_framedone(
@@ -274,6 +279,8 @@ void omap_crtc_error_irq(struct drm_crtc *crtc, uint32_t irqstatus)
void omap_crtc_vblank_irq(struct drm_crtc *crtc)
{
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
+ struct drm_device *dev = omap_crtc->base.dev;
+ struct omap_drm_private *priv = dev->dev_private;
bool pending;
spin_lock(&crtc->dev->event_lock);
@@ -281,7 +288,7 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc)
* If the dispc is busy we're racing the flush operation. Try again on
* the next vblank interrupt.
*/
- if (dispc_mgr_go_busy(omap_crtc->channel)) {
+ if (priv->dispc_ops->mgr_go_busy(omap_crtc->channel)) {
spin_unlock(&crtc->dev->event_lock);
return;
}
@@ -307,6 +314,7 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc)
static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc)
{
+ struct omap_drm_private *priv = crtc->dev->dev_private;
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
struct omap_overlay_manager_info info;
@@ -317,7 +325,7 @@ static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc)
info.partial_alpha_enabled = false;
info.cpr_enable = false;
- dispc_mgr_setup(omap_crtc->channel, &info);
+ priv->dispc_ops->mgr_setup(omap_crtc->channel, &info);
}
/* -----------------------------------------------------------------------------
@@ -401,6 +409,7 @@ static void omap_crtc_atomic_begin(struct drm_crtc *crtc,
static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
struct drm_crtc_state *old_crtc_state)
{
+ struct omap_drm_private *priv = crtc->dev->dev_private;
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
int ret;
@@ -414,7 +423,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
length = crtc->state->gamma_lut->length /
sizeof(*lut);
}
- dispc_mgr_set_gamma(omap_crtc->channel, lut, length);
+ priv->dispc_ops->mgr_set_gamma(omap_crtc->channel, lut, length);
}
omap_crtc_write_crtc_properties(crtc);
@@ -429,7 +438,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
WARN_ON(ret != 0);
spin_lock_irq(&crtc->dev->event_lock);
- dispc_mgr_go(omap_crtc->channel);
+ priv->dispc_ops->mgr_go(omap_crtc->channel);
WARN_ON(omap_crtc->pending);
omap_crtc->pending = true;
@@ -542,6 +551,7 @@ void omap_crtc_pre_uninit(void)
struct drm_crtc *omap_crtc_init(struct drm_device *dev,
struct drm_plane *plane, enum omap_channel channel, int id)
{
+ struct omap_drm_private *priv = dev->dev_private;
struct drm_crtc *crtc = NULL;
struct omap_crtc *omap_crtc;
int ret;
@@ -575,7 +585,7 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev,
* extracted with dispc_mgr_gamma_size(). If it returns 0
* gamma table is not supprted.
*/
- if (dispc_mgr_gamma_size(channel)) {
+ if (priv->dispc_ops->mgr_gamma_size(channel)) {
uint gamma_lut_size = 256;
drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size);
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c
index db0b485ef6c2..c7dbf30a61fa 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -93,7 +93,7 @@ static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
struct drm_atomic_state *old_state = commit->state;
/* Apply the atomic update. */
- dispc_runtime_get();
+ priv->dispc_ops->runtime_get();
drm_atomic_helper_commit_modeset_disables(dev, old_state);
@@ -117,7 +117,7 @@ static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
drm_atomic_helper_cleanup_planes(dev, old_state);
- dispc_runtime_put();
+ priv->dispc_ops->runtime_put();
drm_atomic_state_put(old_state);
@@ -320,8 +320,8 @@ static int omap_modeset_init(struct drm_device *dev)
{
struct omap_drm_private *priv = dev->dev_private;
struct omap_dss_device *dssdev = NULL;
- int num_ovls = dispc_get_num_ovls();
- int num_mgrs = dispc_get_num_mgrs();
+ int num_ovls = priv->dispc_ops->get_num_ovls();
+ int num_mgrs = priv->dispc_ops->get_num_mgrs();
int num_crtcs;
int i, id = 0;
int ret;
@@ -782,6 +782,8 @@ static int pdev_probe(struct platform_device *pdev)
goto err_disconnect_dssdevs;
}
+ priv->dispc_ops = dispc_get_ops();
+
priv->omaprev = pdata->omaprev;
priv->wq = alloc_ordered_workqueue("omapdrm", 0);
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h
index 9098ea138269..3cb7bf259670 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.h
+++ b/drivers/gpu/drm/omapdrm/omap_drv.h
@@ -59,6 +59,8 @@ int omap_irq_wait(struct drm_device *dev, struct omap_irq_wait *wait,
struct omap_drm_private {
uint32_t omaprev;
+ const struct dispc_ops *dispc_ops;
+
unsigned int num_crtcs;
struct drm_crtc *crtcs[8];
diff --git a/drivers/gpu/drm/omapdrm/omap_irq.c b/drivers/gpu/drm/omapdrm/omap_irq.c
index a3fd6e8266c8..26a3c06aa14d 100644
--- a/drivers/gpu/drm/omapdrm/omap_irq.c
+++ b/drivers/gpu/drm/omapdrm/omap_irq.c
@@ -40,8 +40,8 @@ static void omap_irq_update(struct drm_device *dev)
DBG("irqmask=%08x", irqmask);
- dispc_write_irqenable(irqmask);
- dispc_read_irqenable(); /* flush posted write */
+ priv->dispc_ops->write_irqenable(irqmask);
+ priv->dispc_ops->read_irqenable(); /* flush posted write */
}
static void omap_irq_wait_handler(struct omap_irq_wait *wait)
@@ -111,7 +111,7 @@ int omap_irq_enable_vblank(struct drm_crtc *crtc)
DBG("dev=%p, crtc=%u", dev, channel);
spin_lock_irqsave(&priv->wait_lock, flags);
- priv->irq_mask |= dispc_mgr_get_vsync_irq(channel);
+ priv->irq_mask |= priv->dispc_ops->mgr_get_vsync_irq(channel);
omap_irq_update(dev);
spin_unlock_irqrestore(&priv->wait_lock, flags);
@@ -137,7 +137,7 @@ void omap_irq_disable_vblank(struct drm_crtc *crtc)
DBG("dev=%p, crtc=%u", dev, channel);
spin_lock_irqsave(&priv->wait_lock, flags);
- priv->irq_mask &= ~dispc_mgr_get_vsync_irq(channel);
+ priv->irq_mask &= ~priv->dispc_ops->mgr_get_vsync_irq(channel);
omap_irq_update(dev);
spin_unlock_irqrestore(&priv->wait_lock, flags);
}
@@ -200,9 +200,9 @@ static irqreturn_t omap_irq_handler(int irq, void *arg)
unsigned int id;
u32 irqstatus;
- irqstatus = dispc_read_irqstatus();
- dispc_clear_irqstatus(irqstatus);
- dispc_read_irqstatus(); /* flush posted write */
+ irqstatus = priv->dispc_ops->read_irqstatus();
+ priv->dispc_ops->clear_irqstatus(irqstatus);
+ priv->dispc_ops->read_irqstatus(); /* flush posted write */
VERB("irqs: %08x", irqstatus);
@@ -210,12 +210,12 @@ static irqreturn_t omap_irq_handler(int irq, void *arg)
struct drm_crtc *crtc = priv->crtcs[id];
enum omap_channel channel = omap_crtc_channel(crtc);
- if (irqstatus & dispc_mgr_get_vsync_irq(channel)) {
+ if (irqstatus & priv->dispc_ops->mgr_get_vsync_irq(channel)) {
drm_handle_vblank(dev, id);
omap_crtc_vblank_irq(crtc);
}
- if (irqstatus & dispc_mgr_get_sync_lost_irq(channel))
+ if (irqstatus & priv->dispc_ops->mgr_get_sync_lost_irq(channel))
omap_crtc_error_irq(crtc, irqstatus);
}
@@ -249,7 +249,7 @@ static const u32 omap_underflow_irqs[] = {
int omap_drm_irq_install(struct drm_device *dev)
{
struct omap_drm_private *priv = dev->dev_private;
- unsigned int num_mgrs = dispc_get_num_mgrs();
+ unsigned int num_mgrs = priv->dispc_ops->get_num_mgrs();
unsigned int max_planes;
unsigned int i;
int ret;
@@ -267,13 +267,13 @@ int omap_drm_irq_install(struct drm_device *dev)
}
for (i = 0; i < num_mgrs; ++i)
- priv->irq_mask |= dispc_mgr_get_sync_lost_irq(i);
+ priv->irq_mask |= priv->dispc_ops->mgr_get_sync_lost_irq(i);
- dispc_runtime_get();
- dispc_clear_irqstatus(0xffffffff);
- dispc_runtime_put();
+ priv->dispc_ops->runtime_get();
+ priv->dispc_ops->clear_irqstatus(0xffffffff);
+ priv->dispc_ops->runtime_put();
- ret = dispc_request_irq(omap_irq_handler, dev);
+ ret = priv->dispc_ops->request_irq(omap_irq_handler, dev);
if (ret < 0)
return ret;
@@ -284,6 +284,7 @@ int omap_drm_irq_install(struct drm_device *dev)
void omap_drm_irq_uninstall(struct drm_device *dev)
{
+ struct omap_drm_private *priv = dev->dev_private;
unsigned long irqflags;
int i;
@@ -304,5 +305,5 @@ void omap_drm_irq_uninstall(struct drm_device *dev)
spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
}
- dispc_free_irq(dev);
+ priv->dispc_ops->free_irq(dev);
}
diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c
index 1067695af401..bdd74692e0cd 100644
--- a/drivers/gpu/drm/omapdrm/omap_plane.c
+++ b/drivers/gpu/drm/omapdrm/omap_plane.c
@@ -76,6 +76,7 @@ static void omap_plane_cleanup_fb(struct drm_plane *plane,
static void omap_plane_atomic_update(struct drm_plane *plane,
struct drm_plane_state *old_state)
{
+ struct omap_drm_private *priv = plane->dev->dev_private;
struct omap_plane *omap_plane = to_omap_plane(plane);
struct drm_plane_state *state = plane->state;
struct omap_plane_state *omap_state = to_omap_plane_state(state);
@@ -123,25 +124,26 @@ static void omap_plane_atomic_update(struct drm_plane *plane,
DBG("%d,%d %pad %pad", info.pos_x, info.pos_y,
&info.paddr, &info.p_uv_addr);
- dispc_ovl_set_channel_out(omap_plane->id,
+ priv->dispc_ops->ovl_set_channel_out(omap_plane->id,
omap_crtc_channel(state->crtc));
/* and finally, update omapdss: */
- ret = dispc_ovl_setup(omap_plane->id, &info, false,
+ ret = priv->dispc_ops->ovl_setup(omap_plane->id, &info, false,
omap_crtc_timings(state->crtc), false);
if (ret) {
dev_err(plane->dev->dev, "Failed to setup plane %s\n",
omap_plane->name);
- dispc_ovl_enable(omap_plane->id, false);
+ priv->dispc_ops->ovl_enable(omap_plane->id, false);
return;
}
- dispc_ovl_enable(omap_plane->id, true);
+ priv->dispc_ops->ovl_enable(omap_plane->id, true);
}
static void omap_plane_atomic_disable(struct drm_plane *plane,
struct drm_plane_state *old_state)
{
+ struct omap_drm_private *priv = plane->dev->dev_private;
struct omap_plane_state *omap_state = to_omap_plane_state(plane->state);
struct omap_plane *omap_plane = to_omap_plane(plane);
@@ -149,7 +151,7 @@ static void omap_plane_atomic_disable(struct drm_plane *plane,
omap_state->zorder = plane->type == DRM_PLANE_TYPE_PRIMARY
? 0 : omap_plane->id;
- dispc_ovl_enable(omap_plane->id, false);
+ priv->dispc_ops->ovl_enable(omap_plane->id, false);
}
static int omap_plane_atomic_check(struct drm_plane *plane,
@@ -340,6 +342,7 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,
int id, enum drm_plane_type type,
u32 possible_crtcs)
{
+ struct omap_drm_private *priv = dev->dev_private;
struct drm_plane *plane;
struct omap_plane *omap_plane;
int ret;
@@ -352,7 +355,7 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,
omap_plane->nformats = omap_framebuffer_get_formats(
omap_plane->formats, ARRAY_SIZE(omap_plane->formats),
- dispc_ovl_get_color_modes(id));
+ priv->dispc_ops->ovl_get_color_modes(id));
omap_plane->id = id;
omap_plane->name = plane_names[id];