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author | Stephen Boyd <sboyd@codeaurora.org> | 2015-10-02 21:15:13 +0300 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-10-02 21:22:23 +0300 |
commit | 9f30a04d768f64280dc0c40b730746e82f298d88 (patch) | |
tree | e112853eb73627ed7b9a2ef8e4feab6685a0200e /drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c | |
parent | 9e294bf88a583825a413df408b9fe9e658fb93ac (diff) | |
parent | 7aba4f5201d1b7b3ddb0b03883d9edf69851ddad (diff) | |
download | linux-9f30a04d768f64280dc0c40b730746e82f298d88.tar.xz |
Merge branch 'for-4.3-rc/ti-clk-fixes' of https://github.com/t-kristo/linux-pm into clk-fixes
Pull fixes from Tero Kristo:
"A few TI clock driver fixes to pull against 4.3-rc"
* 'for-4.3-rc/ti-clk-fixes' of https://github.com/t-kristo/linux-pm: (3 commits)
clk: ti: dflt: fix enable_reg validity check
clk: ti: fix dual-registration of uart4_ick
clk: ti: clk-7xx: Remove hardwired ABE clock configuration
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c | 100 |
1 files changed, 21 insertions, 79 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c index 6047baee1f75..c42c0c07e2db 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c @@ -21,89 +21,31 @@ * * Authors: Maarten Lankhorst */ -#include <engine/msppp.h> -#include <engine/falcon.h> +#include "priv.h" -struct gf100_msppp_priv { - struct nvkm_falcon base; -}; - -/******************************************************************************* - * MSPPP object classes - ******************************************************************************/ - -static struct nvkm_oclass -gf100_msppp_sclass[] = { - { 0x90b3, &nvkm_object_ofuncs }, - {}, -}; - -/******************************************************************************* - * PMSPPP context - ******************************************************************************/ - -static struct nvkm_oclass -gf100_msppp_cclass = { - .handle = NV_ENGCTX(MSPPP, 0xc0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = _nvkm_falcon_context_ctor, - .dtor = _nvkm_falcon_context_dtor, - .init = _nvkm_falcon_context_init, - .fini = _nvkm_falcon_context_fini, - .rd32 = _nvkm_falcon_context_rd32, - .wr32 = _nvkm_falcon_context_wr32, - }, -}; - -/******************************************************************************* - * PMSPPP engine/subdev functions - ******************************************************************************/ +#include <nvif/class.h> -static int -gf100_msppp_init(struct nvkm_object *object) +static void +gf100_msppp_init(struct nvkm_falcon *msppp) { - struct gf100_msppp_priv *priv = (void *)object; - int ret; - - ret = nvkm_falcon_init(&priv->base); - if (ret) - return ret; - - nv_wr32(priv, 0x086010, 0x0000fff2); - nv_wr32(priv, 0x08601c, 0x0000fff2); - return 0; + struct nvkm_device *device = msppp->engine.subdev.device; + nvkm_wr32(device, 0x086010, 0x0000fff2); + nvkm_wr32(device, 0x08601c, 0x0000fff2); } -static int -gf100_msppp_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) -{ - struct gf100_msppp_priv *priv; - int ret; - - ret = nvkm_falcon_create(parent, engine, oclass, 0x086000, true, - "PMSPPP", "msppp", &priv); - *pobject = nv_object(priv); - if (ret) - return ret; +static const struct nvkm_falcon_func +gf100_msppp = { + .pmc_enable = 0x00000002, + .init = gf100_msppp_init, + .sclass = { + { -1, -1, GF100_MSPPP }, + {} + } +}; - nv_subdev(priv)->unit = 0x00000002; - nv_subdev(priv)->intr = nvkm_falcon_intr; - nv_engine(priv)->cclass = &gf100_msppp_cclass; - nv_engine(priv)->sclass = gf100_msppp_sclass; - return 0; +int +gf100_msppp_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) +{ + return nvkm_msppp_new_(&gf100_msppp, device, index, pengine); } - -struct nvkm_oclass -gf100_msppp_oclass = { - .handle = NV_ENGINE(MSPPP, 0xc0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gf100_msppp_ctor, - .dtor = _nvkm_falcon_dtor, - .init = gf100_msppp_init, - .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, - }, -}; |