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author | Jordan Crouse <jcrouse@codeaurora.org> | 2017-10-20 20:06:55 +0300 |
---|---|---|
committer | Rob Clark <robdclark@gmail.com> | 2017-10-28 18:01:35 +0300 |
commit | f7de15450e906ed6586b29bde609a5686cd0d034 (patch) | |
tree | 2ab062113790ccb8b21eac7dff55cb0ba225f5c2 /drivers/gpu/drm/msm/msm_gem.h | |
parent | 0033e1b523f6d6a60ff7beaaa923cd7656a72959 (diff) | |
download | linux-f7de15450e906ed6586b29bde609a5686cd0d034.tar.xz |
drm/msm: Add per-instance submit queues
Currently the behavior of a command stream is provided by the user
application during submission and the application is expected to internally
maintain the settings for each 'context' or 'rendering queue' and specify
the correct ones.
This works okay for simple cases but as applications become more
complex we will want to set context specific flags and do various
permission checks to allow certain contexts to enable additional
privileges.
Add kernel-side submit queues to be analogous to 'contexts' or
'rendering queues' on the application side. Each file descriptor
instance will maintain its own list of queues. Queues cannot be
shared between file descriptors.
For backwards compatibility context id '0' is defined as a default
context specifying no priority and no special flags. This is
intended to be the usual configuration for 99% of applications so
that a garden variety application can function correctly without
creating a queue. Only those applications requiring the specific
benefit of different queues need create one.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_gem.h')
-rw-r--r-- | drivers/gpu/drm/msm/msm_gem.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 91c210d2359c..17f8a6c23464 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -142,6 +142,7 @@ struct msm_gem_submit { struct list_head bo_list; struct ww_acquire_ctx ticket; struct dma_fence *fence; + struct msm_gpu_submitqueue *queue; struct pid *pid; /* submitting process */ bool valid; /* true if no cmdstream patching needed */ unsigned int nr_cmds; |