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authorMark Brown <broonie@kernel.org>2025-06-24 01:30:49 +0300
committerMark Brown <broonie@kernel.org>2025-06-24 01:30:49 +0300
commit1256eb42db5d1635f4c6da5b1b58db0b53320883 (patch)
tree4a06ef5a4ed8e2f67ead59ad4257a7e6524ed8b1 /drivers/gpu/drm/msm/msm_debugfs.c
parent5fc2c383125c2b4b6037e02ad8796b776b25e6d0 (diff)
parent8f9cf02c8852837923f1cdacfcc92e138513325c (diff)
downloadlinux-1256eb42db5d1635f4c6da5b1b58db0b53320883.tar.xz
spi: microchip-core-qspi: Add regular transfers
Merge series from Conor Dooley <conor@kernel.org>: This is a v2 of a patchset I sent about this time last year, adding the regular transfer_one_message op to the microchip-core-qspi driver. In that v1 Mark expressed his dislike for that op, so v2 is using prepare/unprepare/transfer_one instead. The unprepare implementation still contains the 750 us delay that the driver had back in v1. I've heard a suggestion internally as to why this is needed, but it was unsubstantiated, so I still have no justification for it. I held off on sending a v2 because of a lack of explanation for the delay, but I don't wanna hold off forever for something I might never understand.
Diffstat (limited to 'drivers/gpu/drm/msm/msm_debugfs.c')
-rw-r--r--drivers/gpu/drm/msm/msm_debugfs.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/msm_debugfs.c b/drivers/gpu/drm/msm/msm_debugfs.c
index 7ab607252d18..6af72162cda4 100644
--- a/drivers/gpu/drm/msm/msm_debugfs.c
+++ b/drivers/gpu/drm/msm/msm_debugfs.c
@@ -208,6 +208,35 @@ DEFINE_DEBUGFS_ATTRIBUTE(shrink_fops,
shrink_get, shrink_set,
"0x%08llx\n");
+/*
+ * Return the number of microseconds to wait until stall-on-fault is
+ * re-enabled. If 0 then it is already enabled or will be re-enabled on the
+ * next submit (unless there's a leftover devcoredump). This is useful for
+ * kernel tests that intentionally produce a fault and check the devcoredump to
+ * wait until the cooldown period is over.
+ */
+
+static int
+stall_reenable_time_get(void *data, u64 *val)
+{
+ struct msm_drm_private *priv = data;
+ unsigned long irq_flags;
+
+ spin_lock_irqsave(&priv->fault_stall_lock, irq_flags);
+
+ if (priv->stall_enabled)
+ *val = 0;
+ else
+ *val = max(ktime_us_delta(priv->stall_reenable_time, ktime_get()), 0);
+
+ spin_unlock_irqrestore(&priv->fault_stall_lock, irq_flags);
+
+ return 0;
+}
+
+DEFINE_DEBUGFS_ATTRIBUTE(stall_reenable_time_fops,
+ stall_reenable_time_get, NULL,
+ "%lld\n");
static int msm_gem_show(struct seq_file *m, void *arg)
{
@@ -319,6 +348,9 @@ static void msm_debugfs_gpu_init(struct drm_minor *minor)
debugfs_create_bool("disable_err_irq", 0600, minor->debugfs_root,
&priv->disable_err_irq);
+ debugfs_create_file("stall_reenable_time_us", 0400, minor->debugfs_root,
+ priv, &stall_reenable_time_fops);
+
gpu_devfreq = debugfs_create_dir("devfreq", minor->debugfs_root);
debugfs_create_bool("idle_clamp",0600, gpu_devfreq,