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authorArchit Taneja <architt@codeaurora.org>2017-03-23 13:28:11 +0300
committerRob Clark <robdclark@gmail.com>2017-04-08 13:59:35 +0300
commitc26b4f6cfb2774d13f9ae41cbaaf30f30ac417c6 (patch)
tree5f600ab5e2126e131141f325a89e5bbab93dda24 /drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h
parent7a10ee9b579e04241f981d8e237124aa8762c4c4 (diff)
downloadlinux-c26b4f6cfb2774d13f9ae41cbaaf30f30ac417c6.tar.xz
drm/msm/mdp5: Configure 'right' hwpipe
Now that we have a right hwpipe in mdp5_plane_state, configure it mdp5_plane_mode_set(). The only parameters that vary between the left and right hwpipes are the src_w, src_img_w, src_x and crtc_x as we just even chop the fb into left and right halves. Add a mdp5_plane_right_pipe() which will be used by the crtc code to set up LM stages. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h')
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h
index 5653917bcc9d..8bdb7ee4983b 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h
@@ -275,6 +275,7 @@ void mdp5_irq_domain_fini(struct mdp5_kms *mdp5_kms);
uint32_t mdp5_plane_get_flush(struct drm_plane *plane);
enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane);
+enum mdp5_pipe mdp5_plane_right_pipe(struct drm_plane *plane);
struct drm_plane *mdp5_plane_init(struct drm_device *dev,
enum drm_plane_type type);