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| author | Stephane Viau <sviau@codeaurora.org> | 2015-03-13 22:49:32 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2015-04-02 02:29:34 +0300 |
| commit | d145dd78d7e72ac07c84f6919283569e6b45a5c3 (patch) | |
| tree | 31881cd0904e3115b136b5ee4a3d84f31c4e76b7 /drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | |
| parent | a13cebabc81d709e1649c8d8475f0c0f66c0dd24 (diff) | |
| download | linux-d145dd78d7e72ac07c84f6919283569e6b45a5c3.tar.xz | |
drm/msm/mdp5: Enhance operation mode for pipeline configuration
DSI and WB interfaces need a more complex pipeline configuration
than the current mdp5_ctl_set_intf().
For example, memory output connections need to be selected for
WB. Interface mode (Video vs. Command modes) also need to be
configured for DSI.
This change takes care of configuring the whole pipeline as far
as operation mode goes. DSI and WB interfaces will be added
later.
v2: rename macro to mdp5_cfg_intf_is_virtual() [pointed by Archit]
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
[Remove temp bisectability hack -Rob]
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h')
| -rw-r--r-- | drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h index dba4d52cceeb..4e90740c9749 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h @@ -84,6 +84,10 @@ const struct mdp5_cfg_hw *mdp5_cfg_get_hw_config(struct mdp5_cfg_handler *cfg_hn struct mdp5_cfg *mdp5_cfg_get_config(struct mdp5_cfg_handler *cfg_hnd); int mdp5_cfg_get_hw_rev(struct mdp5_cfg_handler *cfg_hnd); +#define mdp5_cfg_intf_is_virtual(intf_type) ({ \ + typeof(intf_type) __val = (intf_type); \ + (__val) >= INTF_VIRTUAL ? true : false; }) + struct mdp5_cfg_handler *mdp5_cfg_init(struct mdp5_kms *mdp5_kms, uint32_t major, uint32_t minor); void mdp5_cfg_destroy(struct mdp5_cfg_handler *cfg_hnd); |