diff options
| author | Stu Hsieh <stu.hsieh@mediatek.com> | 2018-08-09 05:15:43 +0300 |
|---|---|---|
| committer | CK Hu <ck.hu@mediatek.com> | 2018-08-27 06:24:36 +0300 |
| commit | 94420a63cf784945061b7b5f38511b7a48f034eb (patch) | |
| tree | dbb531bf6459eb2b1b2c63a86f60a1918afe3c8d /drivers/gpu/drm/mediatek | |
| parent | 55b53f6f7ccf0990ad83acf4fdb0436ff79fdfb6 (diff) | |
| download | linux-94420a63cf784945061b7b5f38511b7a48f034eb.tar.xz | |
drm/mediatek: add YUYV/UYVY color format support for RDMA
This patch add YUYV/UYVY color format support for RDMA
and transform matrix for YUYV/UYVY.
Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'drivers/gpu/drm/mediatek')
| -rw-r--r-- | drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c index 091e48e51501..2d27e15445d2 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c @@ -33,6 +33,9 @@ #define RDMA_ENGINE_EN BIT(0) #define RDMA_MODE_MEMORY BIT(1) #define DISP_REG_RDMA_SIZE_CON_0 0x0014 +#define RDMA_MATRIX_ENABLE BIT(17) +#define RDMA_MATRIX_INT_MTX_SEL GENMASK(23, 20) +#define RDMA_MATRIX_INT_MTX_BT601_to_RGB (6 << 20) #define DISP_REG_RDMA_SIZE_CON_1 0x0018 #define DISP_REG_RDMA_TARGET_LINE 0x001c #define DISP_RDMA_MEM_CON 0x0024 @@ -40,6 +43,8 @@ #define MEM_MODE_INPUT_FORMAT_RGB888 (0x001 << 4) #define MEM_MODE_INPUT_FORMAT_RGBA8888 (0x002 << 4) #define MEM_MODE_INPUT_FORMAT_ARGB8888 (0x003 << 4) +#define MEM_MODE_INPUT_FORMAT_UYVY (0x004 << 4) +#define MEM_MODE_INPUT_FORMAT_YUYV (0x005 << 4) #define MEM_MODE_INPUT_SWAP BIT(8) #define DISP_RDMA_MEM_SRC_PITCH 0x002c #define DISP_RDMA_MEM_GMC_SETTING_0 0x0030 @@ -180,6 +185,10 @@ static unsigned int rdma_fmt_convert(struct mtk_disp_rdma *rdma, case DRM_FORMAT_XBGR8888: case DRM_FORMAT_ABGR8888: return MEM_MODE_INPUT_FORMAT_RGBA8888 | MEM_MODE_INPUT_SWAP; + case DRM_FORMAT_UYVY: + return MEM_MODE_INPUT_FORMAT_UYVY; + case DRM_FORMAT_YUYV: + return MEM_MODE_INPUT_FORMAT_YUYV; } } @@ -196,6 +205,17 @@ static void mtk_rdma_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, con = rdma_fmt_convert(rdma, fmt); writel_relaxed(con, comp->regs + DISP_RDMA_MEM_CON); + if (fmt == DRM_FORMAT_UYVY || fmt == DRM_FORMAT_YUYV) { + rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, + RDMA_MATRIX_ENABLE, RDMA_MATRIX_ENABLE); + rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, + RDMA_MATRIX_INT_MTX_SEL, + RDMA_MATRIX_INT_MTX_BT601_to_RGB); + } else { + rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, + RDMA_MATRIX_ENABLE, 0); + } + writel_relaxed(addr, comp->regs + DISP_RDMA_MEM_START_ADDR); writel_relaxed(pitch, comp->regs + DISP_RDMA_MEM_SRC_PITCH); writel(RDMA_MEM_GMC, comp->regs + DISP_RDMA_MEM_GMC_SETTING_0); |