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author | Damien Lespiau <damien.lespiau@intel.com> | 2015-02-09 22:33:21 +0300 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-02-14 01:28:36 +0300 |
commit | e2db7071f14b7ac095a24448e9edd036ba332da3 (patch) | |
tree | 1a20aeeea7f1a98a5dda8a38ff0321b0dfc1db19 /drivers/gpu/drm/i915/intel_ringbuffer.c | |
parent | 2caa3b260aa6a3d015352c07d1bce1461825fa6c (diff) | |
download | linux-e2db7071f14b7ac095a24448e9edd036ba332da3.tar.xz |
drm/i915/skl: Implement WaCcsTlbPrefetchDisable:skl
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 29873ff2dd8d..3c66d80d050a 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -984,6 +984,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) /* WaDisablePartialResolveInVc:skl */ WA_SET_BIT_MASKED(CACHE_MODE_1, GEN9_PARTIAL_RESOLVE_IN_VC_DISABLE); + /* WaCcsTlbPrefetchDisable:skl */ + WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5, + GEN9_CCS_TLB_PREFETCH_ENABLE); + return 0; } |