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| author | Michal Wajdeczko <michal.wajdeczko@intel.com> | 2018-03-12 16:03:07 +0300 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-03-13 01:06:19 +0300 |
| commit | c37d57282033067edf60e044229a4b4f367cc81b (patch) | |
| tree | a2c0a18d5fd9fde640dba9d67ee9771dd9d81684 /drivers/gpu/drm/i915/intel_guc.h | |
| parent | 3c33fc7c1af9a3426eff9015e5bab08a21a5fa9d (diff) | |
| download | linux-c37d57282033067edf60e044229a4b4f367cc81b.tar.xz | |
drm/i915/uc: Sanitize uC together with GEM
Instead of dancing around uC on reset/suspend/resume scenarios,
explicitly sanitize uC when we sanitize GEM to force uC reload
and start from known beginning.
v2: don't forget about reset path (Daniele)
sanitize uc before gem initiated full reset (Daniele)
v3: drop redundant disable_communication in init_hw (Daniele)
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180312130308.22952-3-michal.wajdeczko@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_guc.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 6d5aebe55039..d878160ee6e5 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -133,4 +133,10 @@ int intel_guc_resume(struct intel_guc *guc); struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size); u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv); +static inline int intel_guc_sanitize(struct intel_guc *guc) +{ + intel_uc_fw_sanitize(&guc->fw); + return 0; +} + #endif |