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| author | Imre Deak <imre.deak@intel.com> | 2014-05-19 12:41:18 +0400 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-05-19 19:50:14 +0400 |
| commit | 42a88e97bcdaf596ccd4017a4e064add0cf623db (patch) | |
| tree | c4571f60eb645ec603903d3fa2a3c9bc33a838c4 /drivers/gpu/drm/i915/intel_dsi.c | |
| parent | cf63e4a2206be00336c17f42a810da5ce47e0e78 (diff) | |
| download | linux-42a88e97bcdaf596ccd4017a4e064add0cf623db.tar.xz | |
drm/i915: vlv/chv: fix DSI sideband register accessing
So far we used the wrong opcodes to access the DSI registers, so the
register writes during DSI programming didn't actually succeed and left
the registers unchanged. This wasn't a problem for the initial modeset,
where the BIOS-programmed values happened to work, but after resuming
from s0ix these registers are reset and failing to program them results
in a blank screen.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi.c')
0 files changed, 0 insertions, 0 deletions