summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_dpio_phy.c
diff options
context:
space:
mode:
authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2018-05-11 19:08:10 +0300
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2018-05-11 19:08:10 +0300
commit94cc2fde365fb4484080ea6675bb1e0c933f8002 (patch)
treea249c6f6b12ff2dbe39d78bfb050e9c28619bee9 /drivers/gpu/drm/i915/intel_dpio_phy.c
parent900aa8ad21587e909603f471b6cd81fd5338ec45 (diff)
parent8eb008c80841e3410ef2c043093478ea36bb5ff1 (diff)
downloadlinux-94cc2fde365fb4484080ea6675bb1e0c933f8002.tar.xz
Merge remote-tracking branch 'drm/drm-next' into drm-misc-next
drm-misc-next is still based on v4.16-rc7, and was getting a bit stale. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dpio_phy.c')
-rw-r--r--drivers/gpu/drm/i915/intel_dpio_phy.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c b/drivers/gpu/drm/i915/intel_dpio_phy.c
index c8e9e44e5981..00b3ab656b06 100644
--- a/drivers/gpu/drm/i915/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/intel_dpio_phy.c
@@ -380,13 +380,14 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,
* all 1s. Eventually they become accessible as they power up, then
* the reserved bit will give the default 0. Poll on the reserved bit
* becoming 0 to find when the PHY is accessible.
- * HW team confirmed that the time to reach phypowergood status is
- * anywhere between 50 us and 100us.
+ * The flag should get set in 100us according to the HW team, but
+ * use 1ms due to occasional timeouts observed with that.
*/
- if (wait_for_us(((I915_READ(BXT_PORT_CL1CM_DW0(phy)) &
- (PHY_RESERVED | PHY_POWER_GOOD)) == PHY_POWER_GOOD), 100)) {
+ if (intel_wait_for_register_fw(dev_priv, BXT_PORT_CL1CM_DW0(phy),
+ PHY_RESERVED | PHY_POWER_GOOD,
+ PHY_POWER_GOOD,
+ 1))
DRM_ERROR("timeout during PHY%d power on\n", phy);
- }
/* Program PLL Rcomp code offset */
val = I915_READ(BXT_PORT_CL1CM_DW9(phy));