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author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2021-11-22 15:18:15 +0300 |
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committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2021-11-22 15:18:15 +0300 |
commit | 8626afb170dc44ed0512e04131e4d8eac0c5ec57 (patch) | |
tree | 7cda0ba643d526b1113d08ef80283be6c49716d0 /drivers/gpu/drm/i915/i915_reg.h | |
parent | 865fbc0f8dc21e17dc3ad9f0f1ebf00a6696b2ca (diff) | |
parent | 136057256686de39cc3a07c2e39ef6bc43003ff6 (diff) | |
download | linux-8626afb170dc44ed0512e04131e4d8eac0c5ec57.tar.xz |
Merge drm/drm-next into drm-intel-gt-next
Thomas needs the dma_resv_for_each_fence API for i915/ttm async migration
work.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1fd2a303dfbb..1891e7fac39b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -11830,7 +11830,9 @@ enum skl_power_gate { #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \ _TGL_DSI_CHKN_REG_0, \ _TGL_DSI_CHKN_REG_1) -#define TGL_DSI_CHKN_LSHS_GB REG_GENMASK(15, 12) +#define TGL_DSI_CHKN_LSHS_GB_MASK REG_GENMASK(15, 12) +#define TGL_DSI_CHKN_LSHS_GB(byte_clocks) REG_FIELD_PREP(TGL_DSI_CHKN_LSHS_GB_MASK, \ + (byte_clocks)) /* Display Stream Splitter Control */ #define DSS_CTL1 _MMIO(0x67400) |