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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-02-01 02:50:26 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2017-02-07 20:46:00 +0300 |
| commit | 6248017ae5301ccb51cda92c4117b573b9aff6bb (patch) | |
| tree | a386f1d6e40f0de035c28dc78a69ffe25d2aa713 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | e0ec3ec698851a6c97a12d696407b3ff77700c23 (diff) | |
| download | linux-6248017ae5301ccb51cda92c4117b573b9aff6bb.tar.xz | |
drm/i915: Get correct display clock on 945gm
This is according to Mobile Intel® 945 Express Chipset
Family datasheet.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Link: http://patchwork.freedesktop.org/patch/msgid/20170131235026.26003-1-arthur@aheymans.xyz
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a9538ae81673..4b5761d7716c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -119,7 +119,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define GCFGC 0xf0 /* 915+ only */ #define GC_LOW_FREQUENCY_ENABLE (1 << 7) #define GC_DISPLAY_CLOCK_190_200_MHZ (0 << 4) -#define GC_DISPLAY_CLOCK_333_MHZ (4 << 4) +#define GC_DISPLAY_CLOCK_333_320_MHZ (4 << 4) #define GC_DISPLAY_CLOCK_267_MHZ_PNV (0 << 4) #define GC_DISPLAY_CLOCK_333_MHZ_PNV (1 << 4) #define GC_DISPLAY_CLOCK_444_MHZ_PNV (2 << 4) |